| 103 | } |
| 104 | |
| 105 | static inline uint64_t |
| 106 | counter_u64_fetch_inline(uint64_t *p) |
| 107 | { |
| 108 | struct counter_u64_fetch_cx8_arg arg; |
| 109 | uint64_t res; |
| 110 | int i; |
| 111 | |
| 112 | res = 0; |
| 113 | if ((cpu_feature & CPUID_CX8) == 0) { |
| 114 | /* |
| 115 | * The machines without cmpxchg8b are not SMP. |
| 116 | * Disabling the preemption provides atomicity of the |
| 117 | * counter reading, since update is done in the |
| 118 | * critical section as well. |
| 119 | */ |
| 120 | critical_enter(); |
| 121 | CPU_FOREACH(i) { |
| 122 | res += *(uint64_t *)((char *)p + |
| 123 | UMA_PCPU_ALLOC_SIZE * i); |
| 124 | } |
| 125 | critical_exit(); |
| 126 | } else { |
| 127 | arg.p = p; |
| 128 | arg.res = 0; |
| 129 | smp_rendezvous(NULL, counter_u64_fetch_cx8_one, NULL, &arg); |
| 130 | res = arg.res; |
| 131 | } |
| 132 | return (res); |
| 133 | } |
| 134 | |
| 135 | static inline void |
| 136 | counter_u64_zero_one_8b(uint64_t *p) |
nothing calls this directly
no test coverage detected