| 431 | } |
| 432 | |
| 433 | static void |
| 434 | tsadc_init(struct tsadc_softc *sc) |
| 435 | { |
| 436 | uint32_t val; |
| 437 | |
| 438 | /* Common part */ |
| 439 | val = 0; /* XXX Is this right? */ |
| 440 | if (sc->shutdown_pol != 0) |
| 441 | val |= TSADC_AUTO_CON_POL_HI; |
| 442 | else |
| 443 | val &= ~TSADC_AUTO_CON_POL_HI; |
| 444 | if (sc->conf->q_sel_ntc) |
| 445 | val |= TSADC_AUTO_Q_SEL; |
| 446 | WR4(sc, TSADC_AUTO_CON, val); |
| 447 | |
| 448 | if (!sc->conf->use_syscon) { |
| 449 | /* V2 init */ |
| 450 | WR4(sc, TSADC_AUTO_PERIOD, 250); /* 250 ms */ |
| 451 | WR4(sc, TSADC_AUTO_PERIOD_HT, 50); /* 50 ms */ |
| 452 | WR4(sc, TSADC_HIGHT_INT_DEBOUNCE, 4); |
| 453 | WR4(sc, TSADC_HIGHT_TSHUT_DEBOUNCE, 4); |
| 454 | } else { |
| 455 | /* V3 init */ |
| 456 | if (sc->grf == NULL) { |
| 457 | /* Errata: adjust interleave to working value */ |
| 458 | WR4(sc, TSADC_USER_CON, 13 << 6); /* 13 clks */ |
| 459 | } else { |
| 460 | SYSCON_WRITE_4(sc->grf, GRF_TSADC_TESTBIT_L, |
| 461 | GRF_TSADC_VCM_EN_L); |
| 462 | SYSCON_WRITE_4(sc->grf, GRF_TSADC_TESTBIT_H, |
| 463 | GRF_TSADC_VCM_EN_H); |
| 464 | DELAY(30); /* 15 usec min */ |
| 465 | |
| 466 | SYSCON_WRITE_4(sc->grf, GRF_SARADC_TESTBIT, |
| 467 | GRF_SARADC_TESTBIT_ON); |
| 468 | SYSCON_WRITE_4(sc->grf, GRF_TSADC_TESTBIT_H, |
| 469 | GRF_TSADC_TESTBIT_H_ON); |
| 470 | DELAY(180); /* 90 usec min */ |
| 471 | } |
| 472 | WR4(sc, TSADC_AUTO_PERIOD, 1875); /* 2.5 ms */ |
| 473 | WR4(sc, TSADC_AUTO_PERIOD_HT, 1875); /* 2.5 ms */ |
| 474 | WR4(sc, TSADC_HIGHT_INT_DEBOUNCE, 4); |
| 475 | WR4(sc, TSADC_HIGHT_TSHUT_DEBOUNCE, 4); |
| 476 | } |
| 477 | } |
| 478 | |
| 479 | static int |
| 480 | tsadc_read_temp(struct tsadc_softc *sc, struct tsensor *sensor, int *temp) |
no test coverage detected