| 155 | } |
| 156 | |
| 157 | static int |
| 158 | versatile_pci_attach(device_t dev) |
| 159 | { |
| 160 | struct versatile_pci_softc *sc = device_get_softc(dev); |
| 161 | int err; |
| 162 | int slot; |
| 163 | uint32_t vendordev_id, class_id; |
| 164 | uint32_t val; |
| 165 | phandle_t node; |
| 166 | |
| 167 | node = ofw_bus_get_node(dev); |
| 168 | |
| 169 | /* Request memory resources */ |
| 170 | err = bus_alloc_resources(dev, versatile_pci_mem_spec, |
| 171 | sc->mem_res); |
| 172 | if (err) { |
| 173 | device_printf(dev, "Error: could not allocate memory resources\n"); |
| 174 | return (ENXIO); |
| 175 | } |
| 176 | |
| 177 | /* |
| 178 | * Setup memory windows |
| 179 | */ |
| 180 | versatile_pci_core_write_4(PCI_CORE_IMAP0, (PCI_IO_WINDOW >> 28)); |
| 181 | versatile_pci_core_write_4(PCI_CORE_IMAP1, (PCI_NPREFETCH_WINDOW >> 28)); |
| 182 | versatile_pci_core_write_4(PCI_CORE_IMAP2, (PCI_PREFETCH_WINDOW >> 28)); |
| 183 | |
| 184 | /* |
| 185 | * XXX: this is SDRAM offset >> 28 |
| 186 | * Unused as of QEMU 1.5 |
| 187 | */ |
| 188 | versatile_pci_core_write_4(PCI_CORE_SMAP0, (PCI_IO_WINDOW >> 28)); |
| 189 | versatile_pci_core_write_4(PCI_CORE_SMAP1, (PCI_NPREFETCH_WINDOW >> 28)); |
| 190 | versatile_pci_core_write_4(PCI_CORE_SMAP2, (PCI_NPREFETCH_WINDOW >> 28)); |
| 191 | |
| 192 | versatile_scm_reg_write_4(SCM_PCICTL, 1); |
| 193 | |
| 194 | for (slot = 0; slot <= PCI_SLOTMAX; slot++) { |
| 195 | vendordev_id = versatile_pci_read_4((slot << 11) + PCIR_DEVVENDOR); |
| 196 | class_id = versatile_pci_read_4((slot << 11) + PCIR_REVID); |
| 197 | if ((vendordev_id == VERSATILE_PCI_DEV) && |
| 198 | (class_id == VERSATILE_PCI_CLASS)) |
| 199 | break; |
| 200 | } |
| 201 | |
| 202 | if (slot == (PCI_SLOTMAX + 1)) { |
| 203 | bus_release_resources(dev, versatile_pci_mem_spec, |
| 204 | sc->mem_res); |
| 205 | device_printf(dev, "Versatile PCI core not found\n"); |
| 206 | return (ENXIO); |
| 207 | } |
| 208 | |
| 209 | sc->pcib_slot = slot; |
| 210 | device_printf(dev, "PCI core at slot #%d\n", slot); |
| 211 | |
| 212 | versatile_pci_core_write_4(PCI_CORE_SELFID, slot); |
| 213 | val = versatile_pci_conf_read_4((slot << 11) + PCIR_COMMAND); |
| 214 | val |= (PCIM_CMD_BUSMASTEREN | PCIM_CMD_MEMEN | PCIM_CMD_MWRICEN); |
nothing calls this directly
no test coverage detected