* ti_sdma_attach - driver attach function * @dev: dma device handle * * Initialises memory mapping/pointers to the DMA register set and requests * IRQs. This is effectively the setup function for the driver. * * RETURNS: * 0 on success or a negative error code failure. */
| 1148 | * 0 on success or a negative error code failure. |
| 1149 | */ |
| 1150 | static int |
| 1151 | ti_sdma_attach(device_t dev) |
| 1152 | { |
| 1153 | struct ti_sdma_softc *sc = device_get_softc(dev); |
| 1154 | unsigned int timeout; |
| 1155 | unsigned int i; |
| 1156 | int rid; |
| 1157 | void *ihl; |
| 1158 | int err; |
| 1159 | |
| 1160 | /* Setup the basics */ |
| 1161 | sc->sc_dev = dev; |
| 1162 | |
| 1163 | /* No channels active at the moment */ |
| 1164 | sc->sc_active_channels = 0x00000000; |
| 1165 | |
| 1166 | /* Mutex to protect the shared data structures */ |
| 1167 | TI_SDMA_LOCK_INIT(sc); |
| 1168 | |
| 1169 | /* Get the memory resource for the register mapping */ |
| 1170 | rid = 0; |
| 1171 | sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); |
| 1172 | if (sc->sc_mem_res == NULL) |
| 1173 | panic("%s: Cannot map registers", device_get_name(dev)); |
| 1174 | |
| 1175 | /* Enable the interface and functional clocks */ |
| 1176 | ti_sysc_clock_enable(device_get_parent(dev)); |
| 1177 | |
| 1178 | /* Read the sDMA revision register and sanity check it's known */ |
| 1179 | sc->sc_hw_rev = ti_sdma_read_4(sc, |
| 1180 | ti_sysc_get_rev_address_offset_host(device_get_parent(dev))); |
| 1181 | device_printf(dev, "sDMA revision %08x\n", sc->sc_hw_rev); |
| 1182 | |
| 1183 | if (!ti_sdma_is_omap4_rev(sc) && !ti_sdma_is_omap3_rev(sc)) { |
| 1184 | device_printf(sc->sc_dev, "error - unknown sDMA H/W revision\n"); |
| 1185 | return (EINVAL); |
| 1186 | } |
| 1187 | |
| 1188 | /* Disable all interrupts */ |
| 1189 | for (i = 0; i < NUM_DMA_IRQS; i++) { |
| 1190 | ti_sdma_write_4(sc, DMA4_IRQENABLE_L(i), 0x00000000); |
| 1191 | } |
| 1192 | |
| 1193 | /* Soft-reset is only supported on pre-OMAP44xx devices */ |
| 1194 | if (ti_sdma_is_omap3_rev(sc)) { |
| 1195 | /* Soft-reset */ |
| 1196 | ti_sdma_write_4(sc, DMA4_OCP_SYSCONFIG, 0x0002); |
| 1197 | |
| 1198 | /* Set the timeout to 100ms*/ |
| 1199 | timeout = (hz < 10) ? 1 : ((100 * hz) / 1000); |
| 1200 | |
| 1201 | /* Wait for DMA reset to complete */ |
| 1202 | while ((ti_sdma_read_4(sc, DMA4_SYSSTATUS) & 0x1) == 0x0) { |
| 1203 | /* Sleep for a tick */ |
| 1204 | pause("DMARESET", 1); |
| 1205 | |
| 1206 | if (timeout-- == 0) { |
| 1207 | device_printf(sc->sc_dev, "sDMA reset operation timed out\n"); |
nothing calls this directly
no test coverage detected