| 493 | } |
| 494 | |
| 495 | int |
| 496 | mv_fdt_pm(phandle_t node) |
| 497 | { |
| 498 | uint32_t cpu_pm_ctrl; |
| 499 | int i, ena, compat; |
| 500 | |
| 501 | ena = 1; |
| 502 | cpu_pm_ctrl = read_cpu_ctrl(CPU_PM_CTRL); |
| 503 | for (i = 0; fdt_pm_mask_table[i].compat != NULL; i++) { |
| 504 | if (dev_mask & (1 << i)) |
| 505 | continue; |
| 506 | |
| 507 | compat = ofw_bus_node_is_compatible(node, |
| 508 | fdt_pm_mask_table[i].compat); |
| 509 | #if defined(SOC_MV_KIRKWOOD) |
| 510 | if (compat && (cpu_pm_ctrl & fdt_pm_mask_table[i].mask)) { |
| 511 | dev_mask |= (1 << i); |
| 512 | ena = 0; |
| 513 | break; |
| 514 | } else if (compat) { |
| 515 | dev_mask |= (1 << i); |
| 516 | break; |
| 517 | } |
| 518 | #else |
| 519 | if (compat && (~cpu_pm_ctrl & fdt_pm_mask_table[i].mask)) { |
| 520 | dev_mask |= (1 << i); |
| 521 | ena = 0; |
| 522 | break; |
| 523 | } else if (compat) { |
| 524 | dev_mask |= (1 << i); |
| 525 | break; |
| 526 | } |
| 527 | #endif |
| 528 | } |
| 529 | |
| 530 | return (ena); |
| 531 | } |
| 532 | |
| 533 | uint32_t |
| 534 | read_cpu_ctrl(uint32_t reg) |
no test coverage detected