| 1083 | } |
| 1084 | |
| 1085 | static void |
| 1086 | bcm_sdhost_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off, uint16_t val) |
| 1087 | { |
| 1088 | struct bcm_sdhost_softc *sc = device_get_softc(dev); |
| 1089 | uint16_t val2; |
| 1090 | |
| 1091 | mtx_lock(&sc->mtx); |
| 1092 | |
| 1093 | switch (off) { |
| 1094 | case SDHCI_BLOCK_SIZE: |
| 1095 | dprintf("%s: SDHCI_BLOCK_SIZE val=%04x\n" , |
| 1096 | __func__, val); |
| 1097 | sc->sdhci_blocksize = val; |
| 1098 | WR2(sc, HC_BLOCKSIZE, val); |
| 1099 | break; |
| 1100 | |
| 1101 | case SDHCI_BLOCK_COUNT: |
| 1102 | dprintf("%s: SDHCI_BLOCK_COUNT val=%04x\n" , |
| 1103 | __func__, val); |
| 1104 | sc->sdhci_blockcount = val; |
| 1105 | WR2(sc, HC_BLOCKCOUNT, val); |
| 1106 | break; |
| 1107 | |
| 1108 | case SDHCI_TRANSFER_MODE: |
| 1109 | dprintf("%s: SDHCI_TRANSFER_MODE val=%04x\n" , |
| 1110 | __func__, val); |
| 1111 | break; |
| 1112 | |
| 1113 | case SDHCI_COMMAND_FLAGS: |
| 1114 | bcm_sdhost_command(dev, slot, val); |
| 1115 | break; |
| 1116 | |
| 1117 | case SDHCI_CLOCK_CONTROL: |
| 1118 | val2 = (val & ~SDHCI_DIVIDER_MASK) >> SDHCI_DIVIDER_SHIFT; |
| 1119 | /* get crc16 errors with cdiv=0 */ |
| 1120 | if (val2 == 0) |
| 1121 | val2 = 1; |
| 1122 | dprintf("%s: SDHCI_CLOCK_CONTROL %04x --> SCDIV %04x\n", |
| 1123 | __func__, val, val2); |
| 1124 | WR4(sc, HC_CLOCKDIVISOR, val2); |
| 1125 | break; |
| 1126 | |
| 1127 | case SDHCI_ACMD12_ERR: |
| 1128 | dprintf("%s: SDHCI_ACMD12_ERR val=%04x\n" , |
| 1129 | __func__, val); |
| 1130 | break; |
| 1131 | |
| 1132 | case SDHCI_HOST_CONTROL2: |
| 1133 | dprintf("%s: SDHCI_HOST_CONTROL2 val=%04x\n" , |
| 1134 | __func__, val); |
| 1135 | break; |
| 1136 | |
| 1137 | case SDHCI_SLOT_INT_STATUS: |
| 1138 | dprintf("%s: SDHCI_SLOT_INT_STATUS val=%04x\n" , |
| 1139 | __func__, val); |
| 1140 | break; |
| 1141 | |
| 1142 | default: |
nothing calls this directly
no test coverage detected