* pl310_cache_sync - performs a cache sync operation * * According to the TRM: * * "Before writing to any other register you must perform an explicit * Cache Sync operation. This is particularly important when the cache is * enabled and changes to how the cache allocates new lines are to be made." * * */
| 231 | * |
| 232 | */ |
| 233 | static __inline void |
| 234 | pl310_cache_sync(void) |
| 235 | { |
| 236 | |
| 237 | if ((pl310_softc == NULL) || !pl310_softc->sc_enabled) |
| 238 | return; |
| 239 | |
| 240 | /* Do not sync outer cache on IO coherent platform */ |
| 241 | if (pl310_softc->sc_io_coherent) |
| 242 | return; |
| 243 | |
| 244 | #ifdef PL310_ERRATA_753970 |
| 245 | if (pl310_softc->sc_rtl_revision == CACHE_ID_RELEASE_r3p0) |
| 246 | /* Write uncached PL310 register */ |
| 247 | pl310_write4(pl310_softc, 0x740, 0xffffffff); |
| 248 | else |
| 249 | #endif |
| 250 | pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0xffffffff); |
| 251 | } |
| 252 | |
| 253 | static void |
| 254 | pl310_wbinv_all(void) |
no test coverage detected