| 108 | } |
| 109 | |
| 110 | void |
| 111 | aw_mp_start_ap(platform_t plat) |
| 112 | { |
| 113 | bus_space_handle_t cpucfg; |
| 114 | bus_space_handle_t prcm; |
| 115 | int i, j, soc_family; |
| 116 | uint32_t val; |
| 117 | |
| 118 | soc_family = allwinner_soc_family(); |
| 119 | if (soc_family == ALLWINNERSOC_SUN7I) { |
| 120 | if (bus_space_map(fdtbus_bs_tag, A20_CPUCFG_BASE, CPUCFG_SIZE, |
| 121 | 0, &cpucfg) != 0) |
| 122 | panic("Couldn't map the CPUCFG\n"); |
| 123 | } else { |
| 124 | if (bus_space_map(fdtbus_bs_tag, CPUCFG_BASE, CPUCFG_SIZE, |
| 125 | 0, &cpucfg) != 0) |
| 126 | panic("Couldn't map the CPUCFG\n"); |
| 127 | if (bus_space_map(fdtbus_bs_tag, PRCM_BASE, PRCM_SIZE, 0, |
| 128 | &prcm) != 0) |
| 129 | panic("Couldn't map the PRCM\n"); |
| 130 | } |
| 131 | |
| 132 | dcache_wbinv_poc_all(); |
| 133 | |
| 134 | bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_P_REG0, |
| 135 | pmap_kextract((vm_offset_t)mpentry)); |
| 136 | |
| 137 | /* |
| 138 | * Assert nCOREPORESET low and set L1RSTDISABLE low. |
| 139 | * Ensure DBGPWRDUP is set to LOW to prevent any external |
| 140 | * debug access to the processor. |
| 141 | */ |
| 142 | for (i = 1; i < mp_ncpus; i++) |
| 143 | bus_space_write_4(fdtbus_bs_tag, cpucfg, CPU_RST_CTL(i), 0); |
| 144 | |
| 145 | /* Set L1RSTDISABLE low */ |
| 146 | val = bus_space_read_4(fdtbus_bs_tag, cpucfg, CPUCFG_GENCTL); |
| 147 | for (i = 1; i < mp_ncpus; i++) |
| 148 | val &= ~(1 << i); |
| 149 | bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_GENCTL, val); |
| 150 | |
| 151 | /* Set DBGPWRDUP low */ |
| 152 | val = bus_space_read_4(fdtbus_bs_tag, cpucfg, CPUCFG_DBGCTL1); |
| 153 | for (i = 1; i < mp_ncpus; i++) |
| 154 | val &= ~(1 << i); |
| 155 | bus_space_write_4(fdtbus_bs_tag, cpucfg, CPUCFG_DBGCTL1, val); |
| 156 | |
| 157 | /* Release power clamp */ |
| 158 | for (i = 1; i < mp_ncpus; i++) |
| 159 | for (j = 0; j <= CPU_PWR_CLAMP_STEPS; j++) { |
| 160 | if (soc_family != ALLWINNERSOC_SUN7I) { |
| 161 | bus_space_write_4(fdtbus_bs_tag, prcm, |
| 162 | CPU_PWR_CLAMP(i), 0xff >> j); |
| 163 | } else { |
| 164 | bus_space_write_4(fdtbus_bs_tag, |
| 165 | cpucfg, A20_CPU1_PWR_CLAMP, 0xff >> j); |
| 166 | } |
| 167 | } |
nothing calls this directly
no test coverage detected