| 180 | } |
| 181 | |
| 182 | static int |
| 183 | a31dmac_attach(device_t dev) |
| 184 | { |
| 185 | struct a31dmac_softc *sc; |
| 186 | struct a31dmac_config *conf; |
| 187 | u_int index; |
| 188 | hwreset_t rst; |
| 189 | clk_t clk; |
| 190 | int error; |
| 191 | |
| 192 | sc = device_get_softc(dev); |
| 193 | conf = (void *)ofw_bus_search_compatible(dev, compat_data)->ocd_data; |
| 194 | clk = NULL; |
| 195 | rst = NULL; |
| 196 | |
| 197 | if (bus_alloc_resources(dev, a31dmac_spec, sc->res)) { |
| 198 | device_printf(dev, "cannot allocate resources for device\n"); |
| 199 | return (ENXIO); |
| 200 | } |
| 201 | |
| 202 | mtx_init(&sc->mtx, "a31 dmac", NULL, MTX_SPIN); |
| 203 | |
| 204 | /* Clock and reset setup */ |
| 205 | if (clk_get_by_ofw_index(dev, 0, 0, &clk) != 0) { |
| 206 | device_printf(dev, "cannot get clock\n"); |
| 207 | goto fail; |
| 208 | } |
| 209 | if (clk_enable(clk) != 0) { |
| 210 | device_printf(dev, "cannot enable clock\n"); |
| 211 | goto fail; |
| 212 | } |
| 213 | if (hwreset_get_by_ofw_idx(dev, 0, 0, &rst) != 0) { |
| 214 | device_printf(dev, "cannot get hwreset\n"); |
| 215 | goto fail; |
| 216 | } |
| 217 | if (hwreset_deassert(rst) != 0) { |
| 218 | device_printf(dev, "cannot de-assert reset\n"); |
| 219 | goto fail; |
| 220 | } |
| 221 | |
| 222 | /* Descriptor DMA */ |
| 223 | error = bus_dma_tag_create( |
| 224 | bus_get_dma_tag(dev), /* Parent tag */ |
| 225 | DESC_ALIGN, 0, /* alignment, boundary */ |
| 226 | BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ |
| 227 | BUS_SPACE_MAXADDR, /* highaddr */ |
| 228 | NULL, NULL, /* filter, filterarg */ |
| 229 | DESC_SIZE, 1, /* maxsize, nsegs */ |
| 230 | DESC_SIZE, /* maxsegsize */ |
| 231 | 0, /* flags */ |
| 232 | NULL, NULL, /* lockfunc, lockarg */ |
| 233 | &sc->dmat); |
| 234 | if (error != 0) { |
| 235 | device_printf(dev, "cannot create dma tag\n"); |
| 236 | goto fail; |
| 237 | } |
| 238 | |
| 239 | /* Disable all interrupts and clear pending status */ |
nothing calls this directly
no test coverage detected