| 10644 | SYSINIT(pmap_pti, SI_SUB_CPU + 1, SI_ORDER_ANY, pmap_pti_init, NULL); |
| 10645 | |
| 10646 | static pdp_entry_t * |
| 10647 | pmap_pti_pdpe(vm_offset_t va) |
| 10648 | { |
| 10649 | pml4_entry_t *pml4e; |
| 10650 | pdp_entry_t *pdpe; |
| 10651 | vm_page_t m; |
| 10652 | vm_pindex_t pml4_idx; |
| 10653 | vm_paddr_t mphys; |
| 10654 | |
| 10655 | VM_OBJECT_ASSERT_WLOCKED(pti_obj); |
| 10656 | |
| 10657 | pml4_idx = pmap_pml4e_index(va); |
| 10658 | pml4e = &pti_pml4[pml4_idx]; |
| 10659 | m = NULL; |
| 10660 | if (*pml4e == 0) { |
| 10661 | if (pti_finalized) |
| 10662 | panic("pml4 alloc after finalization\n"); |
| 10663 | m = pmap_pti_alloc_page(); |
| 10664 | if (*pml4e != 0) { |
| 10665 | pmap_pti_free_page(m); |
| 10666 | mphys = *pml4e & ~PAGE_MASK; |
| 10667 | } else { |
| 10668 | mphys = VM_PAGE_TO_PHYS(m); |
| 10669 | *pml4e = mphys | X86_PG_RW | X86_PG_V; |
| 10670 | } |
| 10671 | } else { |
| 10672 | mphys = *pml4e & ~PAGE_MASK; |
| 10673 | } |
| 10674 | pdpe = (pdp_entry_t *)PHYS_TO_DMAP(mphys) + pmap_pdpe_index(va); |
| 10675 | return (pdpe); |
| 10676 | } |
| 10677 | |
| 10678 | static void |
| 10679 | pmap_pti_wire_pte(void *pte) |
no test coverage detected