Function pmap_invalidate_ept

freebsd/amd64/amd64/pmap.c:2852–2900

* Interrupt the cpus that are executing in the guest context. * This will force the vcpu to exit and the cached EPT mappings * will be invalidated by the host before the next vmresume. */

 * will be invalidated by the host before the next vmresume.
 */
static __inline void
pmap_invalidate_ept(pmap_t pmap)
{
	smr_seq_t goal;
	int ipinum;

	sched_pin();
	KASSERT(!CPU_ISSET(curcpu, &pmap->pm_active),
	    ("pmap_invalidate_ept: absurd pm_active"));

	/*
	 * The TLB mappings associated with a vcpu context are not
	 * flushed each time a different vcpu is chosen to execute.
	 *
	 * This is in contrast with a process's vtop mappings that
	 * are flushed from the TLB on each context switch.
	 *
	 * Therefore we need to do more than just a TLB shootdown on
	 * the active cpus in 'pmap->pm_active'. To do this we keep
	 * track of the number of invalidations performed on this pmap.
	 *
	 * Each vcpu keeps a cache of this counter and compares it
	 * just before a vmresume. If the counter is out-of-date an
	 * invept will be done to flush stale mappings from the TLB.
	 *
	 * To ensure that all vCPU threads have observed the new counter
	 * value before returning, we use SMR.  Ordering is important here:
	 * the VMM enters an SMR read section before loading the counter
	 * and after updating the pm_active bit set.  Thus, pm_active is
	 * a superset of active readers, and any reader that has observed
	 * the goal has observed the new counter value.
	 */
	atomic_add_long(&pmap->pm_eptgen, 1);

	goal = smr_advance(pmap->pm_eptsmr);

	/*
	 * Force the vcpu to exit and trap back into the hypervisor.
	 */
	ipinum = pmap->pm_flags & PMAP_NESTED_IPIMASK;
	ipi_selected(pmap->pm_active, ipinum);
	sched_unpin();

	/*
	 * Ensure that all active vCPUs will observe the new generation counter
	 * value before executing any more guest instructions.
	 */
	smr_wait(pmap->pm_eptsmr, goal);
}

static cpuset_t
pmap_invalidate_cpu_mask(pmap_t pmap)