* Ensure that all currently executing DI blocks, that need to flush * TLB for the given page m, actually flushed the TLB at the time the * function returned. If the page m has an empty PV list and we call * pmap_delayed_invl_wait(), upon its return we know that no CPU has a * valid mapping for the page m in either its page table or TLB. * * This function works by blocking until the global D
| 1055 | * processor. |
| 1056 | */ |
| 1057 | static void |
| 1058 | pmap_delayed_invl_wait_l(vm_page_t m) |
| 1059 | { |
| 1060 | u_long *m_gen; |
| 1061 | #ifdef PV_STATS |
| 1062 | bool accounted = false; |
| 1063 | #endif |
| 1064 | |
| 1065 | m_gen = pmap_delayed_invl_genp(m); |
| 1066 | while (*m_gen > pmap_invl_gen) { |
| 1067 | #ifdef PV_STATS |
| 1068 | if (!accounted) { |
| 1069 | atomic_add_long(&invl_wait, 1); |
| 1070 | accounted = true; |
| 1071 | } |
| 1072 | #endif |
| 1073 | pmap_delayed_invl_wait_block(m_gen, &pmap_invl_gen); |
| 1074 | } |
| 1075 | } |
| 1076 | |
| 1077 | static void |
| 1078 | pmap_delayed_invl_wait_u(vm_page_t m) |
nothing calls this directly
no test coverage detected