| 844 | } |
| 845 | |
| 846 | int |
| 847 | rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id, uint32_t attr_id, |
| 848 | uint32_t *attr_value) |
| 849 | { |
| 850 | struct rte_eventdev *dev; |
| 851 | |
| 852 | if (!attr_value) |
| 853 | return -EINVAL; |
| 854 | |
| 855 | RTE_EVENTDEV_VALID_DEVID_OR_ERR_RET(dev_id, -EINVAL); |
| 856 | dev = &rte_eventdevs[dev_id]; |
| 857 | if (!is_valid_port(dev, port_id)) { |
| 858 | RTE_EDEV_LOG_ERR("Invalid port_id=%" PRIu8, port_id); |
| 859 | return -EINVAL; |
| 860 | } |
| 861 | |
| 862 | switch (attr_id) { |
| 863 | case RTE_EVENT_PORT_ATTR_ENQ_DEPTH: |
| 864 | *attr_value = dev->data->ports_cfg[port_id].enqueue_depth; |
| 865 | break; |
| 866 | case RTE_EVENT_PORT_ATTR_DEQ_DEPTH: |
| 867 | *attr_value = dev->data->ports_cfg[port_id].dequeue_depth; |
| 868 | break; |
| 869 | case RTE_EVENT_PORT_ATTR_NEW_EVENT_THRESHOLD: |
| 870 | *attr_value = dev->data->ports_cfg[port_id].new_event_threshold; |
| 871 | break; |
| 872 | case RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE: |
| 873 | { |
| 874 | uint32_t config; |
| 875 | |
| 876 | config = dev->data->ports_cfg[port_id].event_port_cfg; |
| 877 | *attr_value = !!(config & RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL); |
| 878 | break; |
| 879 | } |
| 880 | default: |
| 881 | return -EINVAL; |
| 882 | }; |
| 883 | |
| 884 | rte_eventdev_trace_port_attr_get(dev_id, dev, port_id, attr_id, *attr_value); |
| 885 | |
| 886 | return 0; |
| 887 | } |
| 888 | |
| 889 | int |
| 890 | rte_event_queue_attr_get(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, |