| 3474 | |
| 3475 | |
| 3476 | static int |
| 3477 | eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats) |
| 3478 | { |
| 3479 | struct rte_eth_dev *dev; |
| 3480 | struct rte_eth_stats eth_stats; |
| 3481 | unsigned int count = 0, i, q; |
| 3482 | uint64_t val, *stats_ptr; |
| 3483 | uint16_t nb_rxqs, nb_txqs; |
| 3484 | int ret; |
| 3485 | |
| 3486 | ret = rte_eth_stats_get(port_id, ð_stats); |
| 3487 | if (ret < 0) |
| 3488 | return ret; |
| 3489 | |
| 3490 | dev = &rte_eth_devices[port_id]; |
| 3491 | |
| 3492 | nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); |
| 3493 | nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS); |
| 3494 | |
| 3495 | /* global stats */ |
| 3496 | for (i = 0; i < RTE_NB_STATS; i++) { |
| 3497 | stats_ptr = RTE_PTR_ADD(ð_stats, |
| 3498 | eth_dev_stats_strings[i].offset); |
| 3499 | val = *stats_ptr; |
| 3500 | xstats[count++].value = val; |
| 3501 | } |
| 3502 | |
| 3503 | if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0) |
| 3504 | return count; |
| 3505 | |
| 3506 | /* per-rxq stats */ |
| 3507 | for (q = 0; q < nb_rxqs; q++) { |
| 3508 | for (i = 0; i < RTE_NB_RXQ_STATS; i++) { |
| 3509 | stats_ptr = RTE_PTR_ADD(ð_stats, |
| 3510 | eth_dev_rxq_stats_strings[i].offset + |
| 3511 | q * sizeof(uint64_t)); |
| 3512 | val = *stats_ptr; |
| 3513 | xstats[count++].value = val; |
| 3514 | } |
| 3515 | } |
| 3516 | |
| 3517 | /* per-txq stats */ |
| 3518 | for (q = 0; q < nb_txqs; q++) { |
| 3519 | for (i = 0; i < RTE_NB_TXQ_STATS; i++) { |
| 3520 | stats_ptr = RTE_PTR_ADD(ð_stats, |
| 3521 | eth_dev_txq_stats_strings[i].offset + |
| 3522 | q * sizeof(uint64_t)); |
| 3523 | val = *stats_ptr; |
| 3524 | xstats[count++].value = val; |
| 3525 | } |
| 3526 | } |
| 3527 | return count; |
| 3528 | } |
| 3529 | |
| 3530 | /* retrieve ethdev extended statistics */ |
| 3531 | int |
no test coverage detected