enable MSI-X interrupts */
| 272 | |
| 273 | /* enable MSI-X interrupts */ |
| 274 | static int |
| 275 | vfio_enable_msix(const struct rte_intr_handle *intr_handle) { |
| 276 | int len, ret; |
| 277 | char irq_set_buf[MSIX_IRQ_SET_BUF_LEN]; |
| 278 | struct vfio_irq_set *irq_set; |
| 279 | int *fd_ptr, vfio_dev_fd, i; |
| 280 | |
| 281 | len = sizeof(irq_set_buf); |
| 282 | |
| 283 | irq_set = (struct vfio_irq_set *) irq_set_buf; |
| 284 | irq_set->argsz = len; |
| 285 | /* 0 < irq_set->count < RTE_MAX_RXTX_INTR_VEC_ID + 1 */ |
| 286 | irq_set->count = rte_intr_max_intr_get(intr_handle) ? |
| 287 | (rte_intr_max_intr_get(intr_handle) > |
| 288 | RTE_MAX_RXTX_INTR_VEC_ID + 1 ? RTE_MAX_RXTX_INTR_VEC_ID + 1 : |
| 289 | rte_intr_max_intr_get(intr_handle)) : 1; |
| 290 | |
| 291 | irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER; |
| 292 | irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX; |
| 293 | irq_set->start = 0; |
| 294 | fd_ptr = (int *) &irq_set->data; |
| 295 | /* INTR vector offset 0 reserve for non-efds mapping */ |
| 296 | fd_ptr[RTE_INTR_VEC_ZERO_OFFSET] = rte_intr_fd_get(intr_handle); |
| 297 | for (i = 0; i < rte_intr_nb_efd_get(intr_handle); i++) { |
| 298 | fd_ptr[RTE_INTR_VEC_RXTX_OFFSET + i] = |
| 299 | rte_intr_efds_index_get(intr_handle, i); |
| 300 | } |
| 301 | |
| 302 | vfio_dev_fd = rte_intr_dev_fd_get(intr_handle); |
| 303 | ret = ioctl(vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set); |
| 304 | |
| 305 | if (ret) { |
| 306 | RTE_LOG(ERR, EAL, "Error enabling MSI-X interrupts for fd %d\n", |
| 307 | rte_intr_fd_get(intr_handle)); |
| 308 | return -1; |
| 309 | } |
| 310 | |
| 311 | return 0; |
| 312 | } |
| 313 | |
| 314 | /* disable MSI-X interrupts */ |
| 315 | static int |
no test coverage detected