| 1113 | } |
| 1114 | |
| 1115 | static void |
| 1116 | acl_rule_stats(struct rte_acl_build_rule *head, struct rte_acl_config *config) |
| 1117 | { |
| 1118 | struct rte_acl_build_rule *rule; |
| 1119 | uint32_t n, m, fields_deactivated = 0; |
| 1120 | uint32_t start = 0, deactivate = 0; |
| 1121 | int tally[RTE_ACL_MAX_LEVELS][TALLY_NUM]; |
| 1122 | |
| 1123 | memset(tally, 0, sizeof(tally)); |
| 1124 | |
| 1125 | for (rule = head; rule != NULL; rule = rule->next) { |
| 1126 | |
| 1127 | for (n = 0; n < config->num_fields; n++) { |
| 1128 | uint32_t field_index = config->defs[n].field_index; |
| 1129 | |
| 1130 | tally[n][TALLY_0]++; |
| 1131 | for (m = 1; m < RTE_DIM(wild_limits); m++) { |
| 1132 | if (rule->wildness[field_index] >= |
| 1133 | wild_limits[m]) |
| 1134 | tally[n][m]++; |
| 1135 | } |
| 1136 | } |
| 1137 | |
| 1138 | for (n = config->num_fields - 1; n > 0; n--) { |
| 1139 | uint32_t field_index = config->defs[n].field_index; |
| 1140 | |
| 1141 | if (rule->wildness[field_index] == 100) |
| 1142 | tally[n][TALLY_DEPTH]++; |
| 1143 | else |
| 1144 | break; |
| 1145 | } |
| 1146 | } |
| 1147 | |
| 1148 | /* |
| 1149 | * Look for any field that is always wild and drop it from the config |
| 1150 | * Only deactivate if all fields for a given input loop are deactivated. |
| 1151 | */ |
| 1152 | for (n = 1; n < config->num_fields; n++) { |
| 1153 | if (config->defs[n].input_index != |
| 1154 | config->defs[n - 1].input_index) { |
| 1155 | for (m = start; m < n; m++) |
| 1156 | tally[m][TALLY_DEACTIVATED] = deactivate; |
| 1157 | fields_deactivated += deactivate; |
| 1158 | start = n; |
| 1159 | deactivate = 1; |
| 1160 | } |
| 1161 | |
| 1162 | /* if the field is not always completely wild */ |
| 1163 | if (tally[n][TALLY_100] != tally[n][TALLY_0]) |
| 1164 | deactivate = 0; |
| 1165 | } |
| 1166 | |
| 1167 | for (m = start; m < n; m++) |
| 1168 | tally[m][TALLY_DEACTIVATED] = deactivate; |
| 1169 | |
| 1170 | fields_deactivated += deactivate; |
| 1171 | |
| 1172 | /* remove deactivated fields */ |
no test coverage detected