* txgbe_init_eeprom_params - Initialize EEPROM params * @hw: pointer to hardware structure * * Initializes the EEPROM parameters txgbe_rom_info within the * txgbe_hw struct in order to set up EEPROM access. **/
| 15 | * txgbe_hw struct in order to set up EEPROM access. |
| 16 | **/ |
| 17 | s32 txgbe_init_eeprom_params(struct txgbe_hw *hw) |
| 18 | { |
| 19 | struct txgbe_rom_info *eeprom = &hw->rom; |
| 20 | u32 eec; |
| 21 | u16 eeprom_size; |
| 22 | int err = 0; |
| 23 | |
| 24 | if (eeprom->type != txgbe_eeprom_unknown) |
| 25 | return 0; |
| 26 | |
| 27 | eeprom->type = txgbe_eeprom_none; |
| 28 | /* Set default semaphore delay to 10ms which is a well |
| 29 | * tested value |
| 30 | */ |
| 31 | eeprom->semaphore_delay = 10; /*ms*/ |
| 32 | /* Clear EEPROM page size, it will be initialized as needed */ |
| 33 | eeprom->word_page_size = 0; |
| 34 | |
| 35 | /* |
| 36 | * Check for EEPROM present first. |
| 37 | * If not present leave as none |
| 38 | */ |
| 39 | eec = rd32(hw, TXGBE_SPISTAT); |
| 40 | if (!(eec & TXGBE_SPISTAT_BPFLASH)) { |
| 41 | eeprom->type = txgbe_eeprom_flash; |
| 42 | |
| 43 | /* |
| 44 | * SPI EEPROM is assumed here. This code would need to |
| 45 | * change if a future EEPROM is not SPI. |
| 46 | */ |
| 47 | eeprom_size = 4096; |
| 48 | eeprom->word_size = eeprom_size >> 1; |
| 49 | } |
| 50 | |
| 51 | eeprom->address_bits = 16; |
| 52 | |
| 53 | err = eeprom->read32(hw, TXGBE_SW_REGION_PTR << 1, &eeprom->sw_addr); |
| 54 | if (err) { |
| 55 | DEBUGOUT("EEPROM read failed."); |
| 56 | return err; |
| 57 | } |
| 58 | |
| 59 | DEBUGOUT("eeprom params: type = %d, size = %d, address bits: %d %d", |
| 60 | eeprom->type, eeprom->word_size, |
| 61 | eeprom->address_bits, eeprom->sw_addr); |
| 62 | |
| 63 | return 0; |
| 64 | } |
| 65 | |
| 66 | /** |
| 67 | * txgbe_get_eeprom_semaphore - Get hardware semaphore |