| 257 | } |
| 258 | |
| 259 | int |
| 260 | sfc_mae_switch_domain_controllers(uint16_t switch_domain_id, |
| 261 | const efx_pcie_interface_t **controllers, |
| 262 | size_t *nb_controllers) |
| 263 | { |
| 264 | struct sfc_mae_switch_domain *domain; |
| 265 | |
| 266 | if (controllers == NULL || nb_controllers == NULL) |
| 267 | return EINVAL; |
| 268 | |
| 269 | rte_spinlock_lock(&sfc_mae_switch.lock); |
| 270 | |
| 271 | domain = sfc_mae_find_switch_domain_by_id(switch_domain_id); |
| 272 | if (domain == NULL) { |
| 273 | rte_spinlock_unlock(&sfc_mae_switch.lock); |
| 274 | return EINVAL; |
| 275 | } |
| 276 | |
| 277 | *controllers = domain->controllers; |
| 278 | *nb_controllers = domain->nb_controllers; |
| 279 | |
| 280 | rte_spinlock_unlock(&sfc_mae_switch.lock); |
| 281 | return 0; |
| 282 | } |
| 283 | |
| 284 | int |
| 285 | sfc_mae_switch_domain_map_controllers(uint16_t switch_domain_id, |
no test coverage detected