| 122 | } |
| 123 | |
| 124 | static int |
| 125 | rx_intr_vec_enable(struct mana_priv *priv) |
| 126 | { |
| 127 | unsigned int i; |
| 128 | unsigned int rxqs_n = priv->dev_data->nb_rx_queues; |
| 129 | unsigned int n = RTE_MIN(rxqs_n, (uint32_t)RTE_MAX_RXTX_INTR_VEC_ID); |
| 130 | struct rte_intr_handle *intr_handle = priv->intr_handle; |
| 131 | int ret; |
| 132 | |
| 133 | rx_intr_vec_disable(priv); |
| 134 | |
| 135 | if (rte_intr_vec_list_alloc(intr_handle, NULL, n)) { |
| 136 | DRV_LOG(ERR, "Failed to allocate memory for interrupt vector"); |
| 137 | return -ENOMEM; |
| 138 | } |
| 139 | |
| 140 | for (i = 0; i < n; i++) { |
| 141 | struct mana_rxq *rxq = priv->dev_data->rx_queues[i]; |
| 142 | |
| 143 | ret = rte_intr_vec_list_index_set(intr_handle, i, |
| 144 | RTE_INTR_VEC_RXTX_OFFSET + i); |
| 145 | if (ret) { |
| 146 | DRV_LOG(ERR, "Failed to set intr vec %u", i); |
| 147 | return ret; |
| 148 | } |
| 149 | |
| 150 | ret = rte_intr_efds_index_set(intr_handle, i, rxq->channel->fd); |
| 151 | if (ret) { |
| 152 | DRV_LOG(ERR, "Failed to set FD at intr %u", i); |
| 153 | return ret; |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | return rte_intr_nb_efd_set(intr_handle, n); |
| 158 | } |
| 159 | |
| 160 | static void |
| 161 | rxq_intr_disable(struct mana_priv *priv) |
no test coverage detected