* This function removes the rss configuration in the mrqe field of MRQC * register and tries to maintain other configurations in the field, such * DCB and Virtualization. * * The MRQC register supplied in section 8.2.3.7.12 of the Intel 82599 * datasheet. From the datasheet, we know that the mrqe field is an enum. So, * masking the mrqe field with '~IXGBE_MRQC_RSSEN' may not completely disab
| 3474 | * which corresponds to DCB and RSS with 8 TCs. |
| 3475 | */ |
| 3476 | static void |
| 3477 | ixgbe_mrqc_rss_remove(struct ixgbe_hw *hw) |
| 3478 | { |
| 3479 | uint32_t mrqc; |
| 3480 | uint32_t mrqc_reg; |
| 3481 | uint32_t mrqe_val; |
| 3482 | |
| 3483 | mrqc_reg = ixgbe_mrqc_reg_get(hw->mac.type); |
| 3484 | mrqc = IXGBE_READ_REG(hw, mrqc_reg); |
| 3485 | mrqe_val = mrqc & IXGBE_MRQC_MRQE_MASK; |
| 3486 | |
| 3487 | switch (mrqe_val) { |
| 3488 | case IXGBE_MRQC_RSSEN: |
| 3489 | /* Completely disable rss */ |
| 3490 | mrqe_val = 0; |
| 3491 | break; |
| 3492 | case IXGBE_MRQC_RTRSS8TCEN: |
| 3493 | mrqe_val = IXGBE_MRQC_RT8TCEN; |
| 3494 | break; |
| 3495 | case IXGBE_MRQC_RTRSS4TCEN: |
| 3496 | mrqe_val = IXGBE_MRQC_RT4TCEN; |
| 3497 | break; |
| 3498 | case IXGBE_MRQC_VMDQRSS64EN: |
| 3499 | mrqe_val = IXGBE_MRQC_VMDQEN; |
| 3500 | break; |
| 3501 | case IXGBE_MRQC_VMDQRSS32EN: |
| 3502 | PMD_DRV_LOG(WARNING, "There is no regression for virtualization" |
| 3503 | " and RSS with 32 pools among the MRQE configurations" |
| 3504 | " after removing RSS, and left it unchanged."); |
| 3505 | break; |
| 3506 | default: |
| 3507 | /* No rss configured, leave it as it is */ |
| 3508 | break; |
| 3509 | } |
| 3510 | mrqc = (mrqc & ~IXGBE_MRQC_MRQE_MASK) | mrqe_val; |
| 3511 | IXGBE_WRITE_REG(hw, mrqc_reg, mrqc); |
| 3512 | } |
| 3513 | |
| 3514 | static void |
| 3515 | ixgbe_rss_disable(struct rte_eth_dev *dev) |
no test coverage detected