| 8144 | } |
| 8145 | |
| 8146 | static int |
| 8147 | ixgbevf_dev_interrupt_get_status(struct rte_eth_dev *dev) |
| 8148 | { |
| 8149 | uint32_t eicr; |
| 8150 | struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); |
| 8151 | struct ixgbe_interrupt *intr = |
| 8152 | IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); |
| 8153 | ixgbevf_intr_disable(dev); |
| 8154 | |
| 8155 | /* read-on-clear nic registers here */ |
| 8156 | eicr = IXGBE_READ_REG(hw, IXGBE_VTEICR); |
| 8157 | intr->flags = 0; |
| 8158 | |
| 8159 | /* only one misc vector supported - mailbox */ |
| 8160 | eicr &= IXGBE_VTEICR_MASK; |
| 8161 | if (eicr == IXGBE_MISC_VEC_ID) |
| 8162 | intr->flags |= IXGBE_FLAG_MAILBOX; |
| 8163 | |
| 8164 | return 0; |
| 8165 | } |
| 8166 | |
| 8167 | static int |
| 8168 | ixgbevf_dev_interrupt_action(struct rte_eth_dev *dev) |
no test coverage detected