| 5162 | } |
| 5163 | |
| 5164 | static int |
| 5165 | ixgbe_dev_rss_reta_update(struct rte_eth_dev *dev, |
| 5166 | struct rte_eth_rss_reta_entry64 *reta_conf, |
| 5167 | uint16_t reta_size) |
| 5168 | { |
| 5169 | uint16_t i, sp_reta_size; |
| 5170 | uint8_t j, mask; |
| 5171 | uint32_t reta, r; |
| 5172 | uint16_t idx, shift; |
| 5173 | struct ixgbe_adapter *adapter = dev->data->dev_private; |
| 5174 | struct rte_eth_dev_data *dev_data = dev->data; |
| 5175 | struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); |
| 5176 | uint32_t reta_reg; |
| 5177 | |
| 5178 | PMD_INIT_FUNC_TRACE(); |
| 5179 | |
| 5180 | if (!dev_data->dev_started) { |
| 5181 | PMD_DRV_LOG(ERR, |
| 5182 | "port %d must be started before rss reta update", |
| 5183 | dev_data->port_id); |
| 5184 | return -EIO; |
| 5185 | } |
| 5186 | |
| 5187 | if (!ixgbe_rss_update_sp(hw->mac.type)) { |
| 5188 | PMD_DRV_LOG(ERR, "RSS reta update is not supported on this " |
| 5189 | "NIC."); |
| 5190 | return -ENOTSUP; |
| 5191 | } |
| 5192 | |
| 5193 | sp_reta_size = ixgbe_reta_size_get(hw->mac.type); |
| 5194 | if (reta_size != sp_reta_size) { |
| 5195 | PMD_DRV_LOG(ERR, "The size of hash lookup table configured " |
| 5196 | "(%d) doesn't match the number hardware can supported " |
| 5197 | "(%d)", reta_size, sp_reta_size); |
| 5198 | return -EINVAL; |
| 5199 | } |
| 5200 | |
| 5201 | for (i = 0; i < reta_size; i += IXGBE_4_BIT_WIDTH) { |
| 5202 | idx = i / RTE_ETH_RETA_GROUP_SIZE; |
| 5203 | shift = i % RTE_ETH_RETA_GROUP_SIZE; |
| 5204 | mask = (uint8_t)((reta_conf[idx].mask >> shift) & |
| 5205 | IXGBE_4_BIT_MASK); |
| 5206 | if (!mask) |
| 5207 | continue; |
| 5208 | reta_reg = ixgbe_reta_reg_get(hw->mac.type, i); |
| 5209 | if (mask == IXGBE_4_BIT_MASK) |
| 5210 | r = 0; |
| 5211 | else |
| 5212 | r = IXGBE_READ_REG(hw, reta_reg); |
| 5213 | for (j = 0, reta = 0; j < IXGBE_4_BIT_WIDTH; j++) { |
| 5214 | if (mask & (0x1 << j)) |
| 5215 | reta |= reta_conf[idx].reta[shift + j] << |
| 5216 | (CHAR_BIT * j); |
| 5217 | else |
| 5218 | reta |= r & (IXGBE_8_BIT_MASK << |
| 5219 | (CHAR_BIT * j)); |
| 5220 | } |
| 5221 | IXGBE_WRITE_REG(hw, reta_reg, reta); |
nothing calls this directly
no test coverage detected