* It reads ICR and sets flag (IXGBE_EICR_LSC) for the link_update. * * @param dev * Pointer to struct rte_eth_dev. * * @return * - On success, zero. * - On failure, a negative value. */
| 4582 | * - On failure, a negative value. |
| 4583 | */ |
| 4584 | static int |
| 4585 | ixgbe_dev_interrupt_get_status(struct rte_eth_dev *dev) |
| 4586 | { |
| 4587 | uint32_t eicr; |
| 4588 | struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); |
| 4589 | struct ixgbe_interrupt *intr = |
| 4590 | IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); |
| 4591 | |
| 4592 | /* clear all cause mask */ |
| 4593 | ixgbe_disable_intr(hw); |
| 4594 | |
| 4595 | /* read-on-clear nic registers here */ |
| 4596 | eicr = IXGBE_READ_REG(hw, IXGBE_EICR); |
| 4597 | PMD_DRV_LOG(DEBUG, "eicr %x", eicr); |
| 4598 | |
| 4599 | intr->flags = 0; |
| 4600 | |
| 4601 | /* set flag for async link update */ |
| 4602 | if (eicr & IXGBE_EICR_LSC) |
| 4603 | intr->flags |= IXGBE_FLAG_NEED_LINK_UPDATE; |
| 4604 | |
| 4605 | if (eicr & IXGBE_EICR_MAILBOX) |
| 4606 | intr->flags |= IXGBE_FLAG_MAILBOX; |
| 4607 | |
| 4608 | if (eicr & IXGBE_EICR_LINKSEC) |
| 4609 | intr->flags |= IXGBE_FLAG_MACSEC; |
| 4610 | |
| 4611 | if (hw->mac.type == ixgbe_mac_X550EM_x && |
| 4612 | hw->phy.type == ixgbe_phy_x550em_ext_t && |
| 4613 | (eicr & IXGBE_EICR_GPI_SDP0_X550EM_x)) |
| 4614 | intr->flags |= IXGBE_FLAG_PHY_INTERRUPT; |
| 4615 | |
| 4616 | return 0; |
| 4617 | } |
| 4618 | |
| 4619 | /** |
| 4620 | * It gets and then prints the link status. |
no test coverage detected