| 4813 | } |
| 4814 | |
| 4815 | static int |
| 4816 | ice_vlan_offload_set(struct rte_eth_dev *dev, int mask) |
| 4817 | { |
| 4818 | struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); |
| 4819 | struct ice_vsi *vsi = pf->main_vsi; |
| 4820 | struct rte_eth_rxmode *rxmode; |
| 4821 | |
| 4822 | rxmode = &dev->data->dev_conf.rxmode; |
| 4823 | if (mask & RTE_ETH_VLAN_FILTER_MASK) { |
| 4824 | if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER) |
| 4825 | ice_vsi_config_vlan_filter(vsi, true); |
| 4826 | else |
| 4827 | ice_vsi_config_vlan_filter(vsi, false); |
| 4828 | } |
| 4829 | |
| 4830 | struct ice_hw *hw = ICE_VSI_TO_HW(vsi); |
| 4831 | if (!ice_is_dvm_ena(hw)) { |
| 4832 | if (mask & RTE_ETH_VLAN_STRIP_MASK) { |
| 4833 | if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP) |
| 4834 | ice_vsi_config_vlan_stripping(vsi, true); |
| 4835 | else |
| 4836 | ice_vsi_config_vlan_stripping(vsi, false); |
| 4837 | } |
| 4838 | |
| 4839 | if (mask & RTE_ETH_QINQ_STRIP_MASK) { |
| 4840 | PMD_DRV_LOG(ERR, "Single VLAN mode (SVM) does not support qinq"); |
| 4841 | return -ENOTSUP; |
| 4842 | } |
| 4843 | } else { |
| 4844 | if ((mask & RTE_ETH_VLAN_STRIP_MASK) | |
| 4845 | (mask & RTE_ETH_QINQ_STRIP_MASK)) { |
| 4846 | if (rxmode->offloads & (RTE_ETH_RX_OFFLOAD_VLAN_STRIP | |
| 4847 | RTE_ETH_RX_OFFLOAD_QINQ_STRIP)) |
| 4848 | ice_vsi_config_outer_vlan_stripping(vsi, true); |
| 4849 | else |
| 4850 | ice_vsi_config_outer_vlan_stripping(vsi, false); |
| 4851 | } |
| 4852 | |
| 4853 | if (mask & RTE_ETH_QINQ_STRIP_MASK) { |
| 4854 | if (rxmode->offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP) |
| 4855 | ice_vsi_config_vlan_stripping(vsi, true); |
| 4856 | else |
| 4857 | ice_vsi_config_vlan_stripping(vsi, false); |
| 4858 | } |
| 4859 | } |
| 4860 | |
| 4861 | return 0; |
| 4862 | } |
| 4863 | |
| 4864 | static int |
| 4865 | ice_get_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size) |
no test coverage detected