| 871 | } |
| 872 | |
| 873 | void |
| 874 | ice_dcf_uninit_hw(struct rte_eth_dev *eth_dev, struct ice_dcf_hw *hw) |
| 875 | { |
| 876 | struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev); |
| 877 | struct rte_intr_handle *intr_handle = pci_dev->intr_handle; |
| 878 | |
| 879 | if (hw->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_QOS) |
| 880 | if (hw->tm_conf.committed) { |
| 881 | ice_dcf_clear_bw(hw); |
| 882 | ice_dcf_tm_conf_uninit(eth_dev); |
| 883 | } |
| 884 | |
| 885 | ice_dcf_disable_irq0(hw); |
| 886 | rte_intr_disable(intr_handle); |
| 887 | rte_intr_callback_unregister(intr_handle, |
| 888 | ice_dcf_dev_interrupt_handler, hw); |
| 889 | |
| 890 | /* Wait for all `ice-thread` threads to exit. */ |
| 891 | while (__atomic_load_n(&hw->vsi_update_thread_num, |
| 892 | __ATOMIC_ACQUIRE) != 0) |
| 893 | rte_delay_ms(ICE_DCF_CHECK_INTERVAL); |
| 894 | |
| 895 | ice_dcf_mode_disable(hw); |
| 896 | iavf_shutdown_adminq(&hw->avf); |
| 897 | |
| 898 | rte_free(hw->arq_buf); |
| 899 | hw->arq_buf = NULL; |
| 900 | |
| 901 | rte_free(hw->vf_vsi_map); |
| 902 | hw->vf_vsi_map = NULL; |
| 903 | |
| 904 | rte_free(hw->vf_res); |
| 905 | hw->vf_res = NULL; |
| 906 | |
| 907 | rte_free(hw->rss_lut); |
| 908 | hw->rss_lut = NULL; |
| 909 | |
| 910 | rte_free(hw->rss_key); |
| 911 | hw->rss_key = NULL; |
| 912 | |
| 913 | rte_free(hw->qos_bw_cfg); |
| 914 | hw->qos_bw_cfg = NULL; |
| 915 | |
| 916 | rte_free(hw->ets_config); |
| 917 | hw->ets_config = NULL; |
| 918 | } |
| 919 | |
| 920 | int |
| 921 | ice_dcf_configure_rss_key(struct ice_dcf_hw *hw) |
no test coverage detected