| 4871 | } |
| 4872 | |
| 4873 | static int |
| 4874 | i40e_pf_get_switch_config(struct i40e_pf *pf) |
| 4875 | { |
| 4876 | struct i40e_hw *hw = I40E_PF_TO_HW(pf); |
| 4877 | struct i40e_aqc_get_switch_config_resp *switch_config; |
| 4878 | struct i40e_aqc_switch_config_element_resp *element; |
| 4879 | uint16_t start_seid = 0, num_reported; |
| 4880 | int ret; |
| 4881 | |
| 4882 | switch_config = (struct i40e_aqc_get_switch_config_resp *)\ |
| 4883 | rte_zmalloc("i40e", I40E_AQ_LARGE_BUF, 0); |
| 4884 | if (!switch_config) { |
| 4885 | PMD_DRV_LOG(ERR, "Failed to allocated memory"); |
| 4886 | return -ENOMEM; |
| 4887 | } |
| 4888 | |
| 4889 | /* Get the switch configurations */ |
| 4890 | ret = i40e_aq_get_switch_config(hw, switch_config, |
| 4891 | I40E_AQ_LARGE_BUF, &start_seid, NULL); |
| 4892 | if (ret != I40E_SUCCESS) { |
| 4893 | PMD_DRV_LOG(ERR, "Failed to get switch configurations"); |
| 4894 | goto fail; |
| 4895 | } |
| 4896 | num_reported = rte_le_to_cpu_16(switch_config->header.num_reported); |
| 4897 | if (num_reported != 1) { /* The number should be 1 */ |
| 4898 | PMD_DRV_LOG(ERR, "Wrong number of switch config reported"); |
| 4899 | goto fail; |
| 4900 | } |
| 4901 | |
| 4902 | /* Parse the switch configuration elements */ |
| 4903 | element = &(switch_config->element[0]); |
| 4904 | if (element->element_type == I40E_SWITCH_ELEMENT_TYPE_VSI) { |
| 4905 | pf->mac_seid = rte_le_to_cpu_16(element->uplink_seid); |
| 4906 | pf->main_vsi_seid = rte_le_to_cpu_16(element->seid); |
| 4907 | } else |
| 4908 | PMD_DRV_LOG(INFO, "Unknown element type"); |
| 4909 | |
| 4910 | fail: |
| 4911 | rte_free(switch_config); |
| 4912 | |
| 4913 | return ret; |
| 4914 | } |
| 4915 | |
| 4916 | static int |
| 4917 | i40e_res_pool_init (struct i40e_res_pool_info *pool, uint32_t base, |
no test coverage detected