| 6737 | } |
| 6738 | |
| 6739 | static void |
| 6740 | i40e_dev_handle_aq_msg(struct rte_eth_dev *dev) |
| 6741 | { |
| 6742 | struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private); |
| 6743 | struct i40e_arq_event_info info; |
| 6744 | uint16_t pending, opcode; |
| 6745 | int ret; |
| 6746 | |
| 6747 | info.buf_len = I40E_AQ_BUF_SZ; |
| 6748 | info.msg_buf = rte_zmalloc("msg_buffer", info.buf_len, 0); |
| 6749 | if (!info.msg_buf) { |
| 6750 | PMD_DRV_LOG(ERR, "Failed to allocate mem"); |
| 6751 | return; |
| 6752 | } |
| 6753 | |
| 6754 | pending = 1; |
| 6755 | while (pending) { |
| 6756 | ret = i40e_clean_arq_element(hw, &info, &pending); |
| 6757 | |
| 6758 | if (ret != I40E_SUCCESS) { |
| 6759 | PMD_DRV_LOG(INFO, |
| 6760 | "Failed to read msg from AdminQ, aq_err: %u", |
| 6761 | hw->aq.asq_last_status); |
| 6762 | break; |
| 6763 | } |
| 6764 | opcode = rte_le_to_cpu_16(info.desc.opcode); |
| 6765 | |
| 6766 | switch (opcode) { |
| 6767 | case i40e_aqc_opc_send_msg_to_pf: |
| 6768 | /* Refer to i40e_aq_send_msg_to_pf() for argument layout*/ |
| 6769 | i40e_pf_host_handle_vf_msg(dev, |
| 6770 | rte_le_to_cpu_16(info.desc.retval), |
| 6771 | rte_le_to_cpu_32(info.desc.cookie_high), |
| 6772 | rte_le_to_cpu_32(info.desc.cookie_low), |
| 6773 | info.msg_buf, |
| 6774 | info.msg_len); |
| 6775 | break; |
| 6776 | case i40e_aqc_opc_get_link_status: |
| 6777 | ret = i40e_dev_link_update(dev, 0); |
| 6778 | if (!ret) |
| 6779 | rte_eth_dev_callback_process(dev, |
| 6780 | RTE_ETH_EVENT_INTR_LSC, NULL); |
| 6781 | break; |
| 6782 | default: |
| 6783 | PMD_DRV_LOG(DEBUG, "Request %u is not supported yet", |
| 6784 | opcode); |
| 6785 | break; |
| 6786 | } |
| 6787 | } |
| 6788 | rte_free(info.msg_buf); |
| 6789 | } |
| 6790 | |
| 6791 | static void |
| 6792 | i40e_handle_mdd_event(struct rte_eth_dev *dev) |
no test coverage detected