| 1409 | } |
| 1410 | |
| 1411 | int ena_com_create_io_cq(struct ena_com_dev *ena_dev, |
| 1412 | struct ena_com_io_cq *io_cq) |
| 1413 | { |
| 1414 | struct ena_com_admin_queue *admin_queue = &ena_dev->admin_queue; |
| 1415 | struct ena_admin_aq_create_cq_cmd create_cmd; |
| 1416 | struct ena_admin_acq_create_cq_resp_desc cmd_completion; |
| 1417 | int ret; |
| 1418 | |
| 1419 | memset(&create_cmd, 0x0, sizeof(create_cmd)); |
| 1420 | |
| 1421 | create_cmd.aq_common_descriptor.opcode = ENA_ADMIN_CREATE_CQ; |
| 1422 | |
| 1423 | create_cmd.cq_caps_2 |= (io_cq->cdesc_entry_size_in_bytes / 4) & |
| 1424 | ENA_ADMIN_AQ_CREATE_CQ_CMD_CQ_ENTRY_SIZE_WORDS_MASK; |
| 1425 | create_cmd.cq_caps_1 |= |
| 1426 | ENA_ADMIN_AQ_CREATE_CQ_CMD_INTERRUPT_MODE_ENABLED_MASK; |
| 1427 | |
| 1428 | create_cmd.msix_vector = io_cq->msix_vector; |
| 1429 | create_cmd.cq_depth = io_cq->q_depth; |
| 1430 | |
| 1431 | ret = ena_com_mem_addr_set(ena_dev, |
| 1432 | &create_cmd.cq_ba, |
| 1433 | io_cq->cdesc_addr.phys_addr); |
| 1434 | if (unlikely(ret)) { |
| 1435 | ena_trc_err(ena_dev, "Memory address set failed\n"); |
| 1436 | return ret; |
| 1437 | } |
| 1438 | |
| 1439 | ret = ena_com_execute_admin_command(admin_queue, |
| 1440 | (struct ena_admin_aq_entry *)&create_cmd, |
| 1441 | sizeof(create_cmd), |
| 1442 | (struct ena_admin_acq_entry *)&cmd_completion, |
| 1443 | sizeof(cmd_completion)); |
| 1444 | if (unlikely(ret)) { |
| 1445 | ena_trc_err(ena_dev, "Failed to create IO CQ. error: %d\n", ret); |
| 1446 | return ret; |
| 1447 | } |
| 1448 | |
| 1449 | io_cq->idx = cmd_completion.cq_idx; |
| 1450 | |
| 1451 | io_cq->unmask_reg = (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + |
| 1452 | cmd_completion.cq_interrupt_unmask_register_offset); |
| 1453 | |
| 1454 | if (cmd_completion.numa_node_register_offset) |
| 1455 | io_cq->numa_node_cfg_reg = |
| 1456 | (u32 __iomem *)((uintptr_t)ena_dev->reg_bar + |
| 1457 | cmd_completion.numa_node_register_offset); |
| 1458 | |
| 1459 | ena_trc_dbg(ena_dev, "Created cq[%u], depth[%u]\n", io_cq->idx, io_cq->q_depth); |
| 1460 | |
| 1461 | return ret; |
| 1462 | } |
| 1463 | |
| 1464 | int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid, |
| 1465 | struct ena_com_io_sq **io_sq, |
no test coverage detected