| 450 | } |
| 451 | |
| 452 | static void |
| 453 | em_set_pba(struct e1000_hw *hw) |
| 454 | { |
| 455 | uint32_t pba; |
| 456 | |
| 457 | /* |
| 458 | * Packet Buffer Allocation (PBA) |
| 459 | * Writing PBA sets the receive portion of the buffer |
| 460 | * the remainder is used for the transmit buffer. |
| 461 | * Devices before the 82547 had a Packet Buffer of 64K. |
| 462 | * After the 82547 the buffer was reduced to 40K. |
| 463 | */ |
| 464 | switch (hw->mac.type) { |
| 465 | case e1000_82547: |
| 466 | case e1000_82547_rev_2: |
| 467 | /* 82547: Total Packet Buffer is 40K */ |
| 468 | pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */ |
| 469 | break; |
| 470 | case e1000_82571: |
| 471 | case e1000_82572: |
| 472 | case e1000_80003es2lan: |
| 473 | pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */ |
| 474 | break; |
| 475 | case e1000_82573: /* 82573: Total Packet Buffer is 32K */ |
| 476 | pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */ |
| 477 | break; |
| 478 | case e1000_82574: |
| 479 | case e1000_82583: |
| 480 | pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */ |
| 481 | break; |
| 482 | case e1000_ich8lan: |
| 483 | pba = E1000_PBA_8K; |
| 484 | break; |
| 485 | case e1000_ich9lan: |
| 486 | case e1000_ich10lan: |
| 487 | pba = E1000_PBA_10K; |
| 488 | break; |
| 489 | case e1000_pchlan: |
| 490 | case e1000_pch2lan: |
| 491 | case e1000_pch_lpt: |
| 492 | case e1000_pch_spt: |
| 493 | case e1000_pch_cnp: |
| 494 | case e1000_pch_adp: |
| 495 | case e1000_pch_tgp: |
| 496 | pba = E1000_PBA_26K; |
| 497 | break; |
| 498 | default: |
| 499 | pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */ |
| 500 | } |
| 501 | |
| 502 | E1000_WRITE_REG(hw, E1000_PBA, pba); |
| 503 | } |
| 504 | |
| 505 | static void |
| 506 | eth_em_rxtx_control(struct rte_eth_dev *dev, |