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Function t4_sge_init_soft

dpdk/drivers/net/cxgbe/sge.c:2313–2367  ·  view source on GitHub ↗

* t4_sge_init - initialize SGE * @adap: the adapter * * Performs SGE initialization needed every time after a chip reset. * We do not initialize any of the queues here, instead the driver * top-level must request those individually. * * Called in two different modes: * * 1. Perform actual hardware initialization and record hard-coded * parameters which were used. This gets used whe

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2311 * order to do our job and make sure we can live with them ...
2312 */
2313static int t4_sge_init_soft(struct adapter *adap)
2314{
2315 u32 timer_value_0_and_1, timer_value_2_and_3, timer_value_4_and_5;
2316 struct sge *s = &adap->sge;
2317 u32 ingress_rx_threshold;
2318 u8 i;
2319
2320 /*
2321 * Verify that CPL messages are going to the Ingress Queue for
2322 * process_responses() and that only packet data is going to the
2323 * Free Lists.
2324 */
2325 if ((t4_read_reg(adap, A_SGE_CONTROL) & F_RXPKTCPLMODE) !=
2326 V_RXPKTCPLMODE(X_RXPKTCPLMODE_SPLIT)) {
2327 dev_err(adap, "bad SGE CPL MODE\n");
2328 return -EINVAL;
2329 }
2330
2331 /*
2332 * Read the Host Buffer Register Array indices that we want to
2333 * use ...
2334 */
2335 for (i = 0; i < RTE_DIM(s->fl_buffer_size); i++)
2336 s->fl_buffer_size[i] = t4_read_reg(adap,
2337 A_SGE_FL_BUFFER_SIZE0 +
2338 i * sizeof(u32));
2339
2340 /*
2341 * Retrieve our RX interrupt holdoff timer values and counter
2342 * threshold values from the SGE parameters.
2343 */
2344 timer_value_0_and_1 = t4_read_reg(adap, A_SGE_TIMER_VALUE_0_AND_1);
2345 timer_value_2_and_3 = t4_read_reg(adap, A_SGE_TIMER_VALUE_2_AND_3);
2346 timer_value_4_and_5 = t4_read_reg(adap, A_SGE_TIMER_VALUE_4_AND_5);
2347 s->timer_val[0] = core_ticks_to_us(adap,
2348 G_TIMERVALUE0(timer_value_0_and_1));
2349 s->timer_val[1] = core_ticks_to_us(adap,
2350 G_TIMERVALUE1(timer_value_0_and_1));
2351 s->timer_val[2] = core_ticks_to_us(adap,
2352 G_TIMERVALUE2(timer_value_2_and_3));
2353 s->timer_val[3] = core_ticks_to_us(adap,
2354 G_TIMERVALUE3(timer_value_2_and_3));
2355 s->timer_val[4] = core_ticks_to_us(adap,
2356 G_TIMERVALUE4(timer_value_4_and_5));
2357 s->timer_val[5] = core_ticks_to_us(adap,
2358 G_TIMERVALUE5(timer_value_4_and_5));
2359
2360 ingress_rx_threshold = t4_read_reg(adap, A_SGE_INGRESS_RX_THRESHOLD);
2361 s->counter_val[0] = G_THRESHOLD_0(ingress_rx_threshold);
2362 s->counter_val[1] = G_THRESHOLD_1(ingress_rx_threshold);
2363 s->counter_val[2] = G_THRESHOLD_2(ingress_rx_threshold);
2364 s->counter_val[3] = G_THRESHOLD_3(ingress_rx_threshold);
2365
2366 return 0;
2367}
2368
2369int t4_sge_init(struct adapter *adap)
2370{

Callers 1

t4_sge_initFunction · 0.85

Calls 2

t4_read_regFunction · 0.85
core_ticks_to_usFunction · 0.85

Tested by

no test coverage detected