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hub / github.com/F-Stack/f-stack / t4_sge_alloc_rxq

Function t4_sge_alloc_rxq

dpdk/drivers/net/cxgbe/sge.c:1756–1976  ·  view source on GitHub ↗

* @intr_idx: MSI/MSI-X vector if >=0, -(absolute qid + 1) if < 0 * @cong: < 0 -> no congestion feedback, >= 0 -> congestion channel map */

Source from the content-addressed store, hash-verified

1754 * @cong: < 0 -> no congestion feedback, >= 0 -> congestion channel map
1755 */
1756int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
1757 struct rte_eth_dev *eth_dev, int intr_idx,
1758 struct sge_fl *fl, rspq_handler_t hnd, int cong,
1759 struct rte_mempool *mp, int queue_id, int socket_id)
1760{
1761 struct port_info *pi = eth_dev->data->dev_private;
1762 u8 pciechan, fl_buf_size_idx = 0;
1763 struct sge *s = &adap->sge;
1764 unsigned int nb_refill;
1765 struct fw_iq_cmd c;
1766 int ret, flsz = 0;
1767
1768 if (fl != NULL) {
1769 ret = cxgbe_sge_fl_buf_size_index(adap, mp);
1770 if (ret < 0)
1771 return ret;
1772
1773 fl_buf_size_idx = ret;
1774 }
1775
1776 /* Size needs to be multiple of 16, including status entry. */
1777 iq->size = cxgbe_roundup(iq->size, 16);
1778
1779 iq->desc = alloc_ring(eth_dev, fwevtq ? "fwq_ring" : "rx_ring",
1780 queue_id, socket_id, iq->size, iq->iqe_len,
1781 0, 0, &iq->phys_addr, NULL);
1782 if (!iq->desc)
1783 return -ENOMEM;
1784
1785 memset(&c, 0, sizeof(c));
1786 c.op_to_vfn = htonl(V_FW_CMD_OP(FW_IQ_CMD) | F_FW_CMD_REQUEST |
1787 F_FW_CMD_WRITE | F_FW_CMD_EXEC);
1788
1789 if (is_pf4(adap)) {
1790 pciechan = pi->tx_chan;
1791 c.op_to_vfn |= htonl(V_FW_IQ_CMD_PFN(adap->pf) |
1792 V_FW_IQ_CMD_VFN(0));
1793 if (cong >= 0)
1794 c.iqns_to_fl0congen =
1795 htonl(F_FW_IQ_CMD_IQFLINTCONGEN |
1796 V_FW_IQ_CMD_IQTYPE(cong ?
1797 FW_IQ_IQTYPE_NIC :
1798 FW_IQ_IQTYPE_OFLD) |
1799 F_FW_IQ_CMD_IQRO);
1800 } else {
1801 pciechan = pi->port_id;
1802 }
1803
1804 c.alloc_to_len16 = htonl(F_FW_IQ_CMD_ALLOC | F_FW_IQ_CMD_IQSTART |
1805 (sizeof(c) / 16));
1806 c.type_to_iqandstindex =
1807 htonl(V_FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) |
1808 V_FW_IQ_CMD_IQASYNCH(fwevtq) |
1809 V_FW_IQ_CMD_VIID(pi->viid) |
1810 V_FW_IQ_CMD_IQANDST(intr_idx < 0) |
1811 V_FW_IQ_CMD_IQANUD(X_UPDATEDELIVERY_STATUS_PAGE) |
1812 V_FW_IQ_CMD_IQANDSTINDEX(intr_idx >= 0 ? intr_idx :
1813 -intr_idx - 1));

Callers 2

cxgbe_setup_sge_fwevtqFunction · 0.85
cxgbe_dev_rx_queue_setupFunction · 0.85

Calls 14

alloc_ringFunction · 0.85
memsetFunction · 0.85
is_pf4Function · 0.85
t4_wr_mboxFunction · 0.85
t4vf_wr_mboxFunction · 0.85
bar2_addressFunction · 0.85
refill_flFunction · 0.85
fl_capFunction · 0.85
is_t4Function · 0.85
t4_set_paramsFunction · 0.85
t4_iq_freeFunction · 0.85

Tested by

no test coverage detected