| 980 | } |
| 981 | |
| 982 | static int bnxt_update_fc_tbl(struct bnxt *bp, uint16_t ctr, |
| 983 | struct bnxt_filter_info *en_tbl[], |
| 984 | uint16_t in_flow_cnt) |
| 985 | { |
| 986 | uint32_t *in_rx_tbl; |
| 987 | uint64_t *out_rx_tbl; |
| 988 | uint32_t in_rx_tbl_cnt = 0; |
| 989 | uint32_t out_rx_tbl_cnt = 0; |
| 990 | int i, rc = 0; |
| 991 | |
| 992 | in_rx_tbl = (uint32_t *)bp->flow_stat->rx_fc_in_tbl.va; |
| 993 | out_rx_tbl = (uint64_t *)bp->flow_stat->rx_fc_out_tbl.va; |
| 994 | |
| 995 | for (i = 0; i < in_flow_cnt; i++) { |
| 996 | if (!en_tbl[i]) |
| 997 | continue; |
| 998 | |
| 999 | /* Currently only ingress/Rx flows are supported anyway. */ |
| 1000 | bnxt_update_fc_pre_qstat(in_rx_tbl, out_rx_tbl, |
| 1001 | en_tbl[i], &in_rx_tbl_cnt); |
| 1002 | } |
| 1003 | |
| 1004 | /* Currently only ingress/Rx flows are supported */ |
| 1005 | if (in_rx_tbl_cnt) { |
| 1006 | rc = bnxt_hwrm_cfa_counter_qstats(bp, BNXT_DIR_RX, ctr, |
| 1007 | in_rx_tbl_cnt); |
| 1008 | if (rc) |
| 1009 | return rc; |
| 1010 | } |
| 1011 | |
| 1012 | for (i = 0; i < in_flow_cnt; i++) { |
| 1013 | if (!en_tbl[i]) |
| 1014 | continue; |
| 1015 | |
| 1016 | /* Currently only ingress/Rx flows are supported */ |
| 1017 | bnxt_update_fc_post_qstat(en_tbl[i], out_rx_tbl, |
| 1018 | out_rx_tbl_cnt); |
| 1019 | out_rx_tbl_cnt++; |
| 1020 | } |
| 1021 | |
| 1022 | return rc; |
| 1023 | } |
| 1024 | |
| 1025 | /* Walks through the list which has all the flows |
| 1026 | * requesting for explicit flow counters. |
no test coverage detected