| 1312 | } |
| 1313 | |
| 1314 | static eth_tx_burst_t |
| 1315 | bnxt_transmit_function(struct rte_eth_dev *eth_dev) |
| 1316 | { |
| 1317 | struct bnxt *bp = eth_dev->data->dev_private; |
| 1318 | |
| 1319 | /* Disable vector mode TX for Stingray2 for now */ |
| 1320 | if (BNXT_CHIP_SR2(bp)) |
| 1321 | return bnxt_xmit_pkts; |
| 1322 | |
| 1323 | #if defined(RTE_ARCH_X86) || defined(RTE_ARCH_ARM64) |
| 1324 | uint64_t offloads = eth_dev->data->dev_conf.txmode.offloads; |
| 1325 | |
| 1326 | /* |
| 1327 | * Vector mode transmit can be enabled only if not using scatter rx |
| 1328 | * or tx offloads. |
| 1329 | */ |
| 1330 | if (eth_dev->data->scattered_rx || |
| 1331 | (offloads & ~RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE) || |
| 1332 | BNXT_TRUFLOW_EN(bp) || bp->ieee_1588) |
| 1333 | goto use_scalar_tx; |
| 1334 | |
| 1335 | #if defined(RTE_ARCH_X86) |
| 1336 | if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 && |
| 1337 | rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1) { |
| 1338 | PMD_DRV_LOG(INFO, |
| 1339 | "Using AVX2 vector mode transmit for port %d\n", |
| 1340 | eth_dev->data->port_id); |
| 1341 | return bnxt_xmit_pkts_vec_avx2; |
| 1342 | } |
| 1343 | #endif |
| 1344 | if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_128) { |
| 1345 | PMD_DRV_LOG(INFO, |
| 1346 | "Using SSE vector mode transmit for port %d\n", |
| 1347 | eth_dev->data->port_id); |
| 1348 | return bnxt_xmit_pkts_vec; |
| 1349 | } |
| 1350 | |
| 1351 | use_scalar_tx: |
| 1352 | PMD_DRV_LOG(INFO, "Vector mode transmit disabled for port %d\n", |
| 1353 | eth_dev->data->port_id); |
| 1354 | PMD_DRV_LOG(INFO, |
| 1355 | "Port %d scatter: %d tx offload: %" PRIX64 "\n", |
| 1356 | eth_dev->data->port_id, |
| 1357 | eth_dev->data->scattered_rx, |
| 1358 | offloads); |
| 1359 | #endif |
| 1360 | return bnxt_xmit_pkts; |
| 1361 | } |
| 1362 | |
| 1363 | static int bnxt_handle_if_change_status(struct bnxt *bp) |
| 1364 | { |
no test coverage detected