| 743 | } |
| 744 | |
| 745 | static int bnxt_start_nic(struct bnxt *bp) |
| 746 | { |
| 747 | struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(bp->eth_dev); |
| 748 | struct rte_intr_handle *intr_handle = pci_dev->intr_handle; |
| 749 | uint32_t intr_vector = 0; |
| 750 | uint32_t queue_id, base = BNXT_MISC_VEC_ID; |
| 751 | uint32_t vec = BNXT_MISC_VEC_ID; |
| 752 | unsigned int i, j; |
| 753 | int rc; |
| 754 | |
| 755 | if (bp->eth_dev->data->mtu > RTE_ETHER_MTU) |
| 756 | bp->flags |= BNXT_FLAG_JUMBO; |
| 757 | else |
| 758 | bp->flags &= ~BNXT_FLAG_JUMBO; |
| 759 | |
| 760 | /* P5 does not support ring groups. |
| 761 | * But we will use the array to save RSS context IDs. |
| 762 | */ |
| 763 | if (BNXT_CHIP_P5(bp)) |
| 764 | bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_P5; |
| 765 | |
| 766 | rc = bnxt_vnic_queue_db_init(bp); |
| 767 | if (rc) { |
| 768 | PMD_DRV_LOG(ERR, "could not allocate vnic db\n"); |
| 769 | goto err_out; |
| 770 | } |
| 771 | |
| 772 | rc = bnxt_alloc_hwrm_rings(bp); |
| 773 | if (rc) { |
| 774 | PMD_DRV_LOG(ERR, "HWRM ring alloc failure rc: %x\n", rc); |
| 775 | goto err_out; |
| 776 | } |
| 777 | |
| 778 | rc = bnxt_alloc_all_hwrm_ring_grps(bp); |
| 779 | if (rc) { |
| 780 | PMD_DRV_LOG(ERR, "HWRM ring grp alloc failure: %x\n", rc); |
| 781 | goto err_out; |
| 782 | } |
| 783 | |
| 784 | if (!(bp->vnic_cap_flags & BNXT_VNIC_CAP_COS_CLASSIFY)) |
| 785 | goto skip_cosq_cfg; |
| 786 | |
| 787 | for (j = 0, i = 0; i < BNXT_COS_QUEUE_COUNT; i++) { |
| 788 | if (bp->rx_cos_queue[i].id != 0xff) { |
| 789 | struct bnxt_vnic_info *vnic = &bp->vnic_info[j++]; |
| 790 | |
| 791 | if (!vnic) { |
| 792 | PMD_DRV_LOG(ERR, |
| 793 | "Num pools more than FW profile\n"); |
| 794 | rc = -EINVAL; |
| 795 | goto err_out; |
| 796 | } |
| 797 | vnic->cos_queue_id = bp->rx_cos_queue[i].id; |
| 798 | bp->rx_cosq_cnt++; |
| 799 | } |
| 800 | } |
| 801 | |
| 802 | skip_cosq_cfg: |
no test coverage detected