| 3171 | } |
| 3172 | |
| 3173 | static uint32_t |
| 3174 | bnxt_rx_queue_count_op(void *rx_queue) |
| 3175 | { |
| 3176 | struct bnxt *bp; |
| 3177 | struct bnxt_cp_ring_info *cpr; |
| 3178 | uint32_t desc = 0, raw_cons, cp_ring_size; |
| 3179 | struct bnxt_rx_queue *rxq; |
| 3180 | struct rx_pkt_cmpl *rxcmp; |
| 3181 | int rc; |
| 3182 | |
| 3183 | rxq = rx_queue; |
| 3184 | bp = rxq->bp; |
| 3185 | |
| 3186 | rc = is_bnxt_in_error(bp); |
| 3187 | if (rc) |
| 3188 | return rc; |
| 3189 | |
| 3190 | cpr = rxq->cp_ring; |
| 3191 | raw_cons = cpr->cp_raw_cons; |
| 3192 | cp_ring_size = cpr->cp_ring_struct->ring_size; |
| 3193 | |
| 3194 | while (1) { |
| 3195 | uint32_t agg_cnt, cons, cmpl_type; |
| 3196 | |
| 3197 | cons = RING_CMP(cpr->cp_ring_struct, raw_cons); |
| 3198 | rxcmp = (struct rx_pkt_cmpl *)&cpr->cp_desc_ring[cons]; |
| 3199 | |
| 3200 | if (!bnxt_cpr_cmp_valid(rxcmp, raw_cons, cp_ring_size)) |
| 3201 | break; |
| 3202 | |
| 3203 | cmpl_type = CMP_TYPE(rxcmp); |
| 3204 | |
| 3205 | switch (cmpl_type) { |
| 3206 | case CMPL_BASE_TYPE_RX_L2: |
| 3207 | case CMPL_BASE_TYPE_RX_L2_V2: |
| 3208 | agg_cnt = BNXT_RX_L2_AGG_BUFS(rxcmp); |
| 3209 | raw_cons = raw_cons + CMP_LEN(cmpl_type) + agg_cnt; |
| 3210 | desc++; |
| 3211 | break; |
| 3212 | |
| 3213 | case CMPL_BASE_TYPE_RX_TPA_END: |
| 3214 | if (BNXT_CHIP_P5(rxq->bp)) { |
| 3215 | struct rx_tpa_v2_end_cmpl_hi *p5_tpa_end; |
| 3216 | |
| 3217 | p5_tpa_end = (void *)rxcmp; |
| 3218 | agg_cnt = BNXT_TPA_END_AGG_BUFS_TH(p5_tpa_end); |
| 3219 | } else { |
| 3220 | struct rx_tpa_end_cmpl *tpa_end; |
| 3221 | |
| 3222 | tpa_end = (void *)rxcmp; |
| 3223 | agg_cnt = BNXT_TPA_END_AGG_BUFS(tpa_end); |
| 3224 | } |
| 3225 | |
| 3226 | raw_cons = raw_cons + CMP_LEN(cmpl_type) + agg_cnt; |
| 3227 | desc++; |
| 3228 | break; |
| 3229 | |
| 3230 | default: |
nothing calls this directly
no test coverage detected