| 903 | }; |
| 904 | |
| 905 | static |
| 906 | inline uint16_t bnxt_max_rings(struct bnxt *bp) |
| 907 | { |
| 908 | uint16_t max_tx_rings = bp->max_tx_rings; |
| 909 | uint16_t max_rx_rings = bp->max_rx_rings; |
| 910 | uint16_t max_cp_rings = bp->max_cp_rings; |
| 911 | uint16_t max_rings; |
| 912 | |
| 913 | /* For the sake of symmetry: |
| 914 | * max Tx rings == max Rx rings, one stat ctx for each. |
| 915 | */ |
| 916 | if (BNXT_STINGRAY(bp)) { |
| 917 | max_rx_rings = RTE_MIN(RTE_MIN(max_rx_rings / 2U, |
| 918 | MAX_STINGRAY_RINGS), |
| 919 | bp->max_stat_ctx / 2U); |
| 920 | } else { |
| 921 | max_rx_rings = RTE_MIN(max_rx_rings / 2U, |
| 922 | bp->max_stat_ctx / 2U); |
| 923 | } |
| 924 | |
| 925 | /* |
| 926 | * RSS table size in P5 is 512. |
| 927 | * Cap max Rx rings to the same value for RSS. |
| 928 | */ |
| 929 | if (BNXT_CHIP_P5(bp)) |
| 930 | max_rx_rings = RTE_MIN(max_rx_rings, BNXT_RSS_TBL_SIZE_P5); |
| 931 | |
| 932 | max_tx_rings = RTE_MIN(max_tx_rings, max_rx_rings); |
| 933 | if (max_cp_rings > BNXT_NUM_ASYNC_CPR(bp)) |
| 934 | max_cp_rings -= BNXT_NUM_ASYNC_CPR(bp); |
| 935 | max_rings = RTE_MIN(max_cp_rings / 2U, max_tx_rings); |
| 936 | |
| 937 | return max_rings; |
| 938 | } |
| 939 | |
| 940 | #define BNXT_FC_TIMER 1 /* Timer freq in Sec Flow Counters */ |
| 941 |
no outgoing calls
no test coverage detected