| 1051 | }; |
| 1052 | |
| 1053 | static int |
| 1054 | dpaa2_eventdev_setup_dpci(struct dpaa2_dpci_dev *dpci_dev, |
| 1055 | struct dpaa2_dpcon_dev *dpcon_dev) |
| 1056 | { |
| 1057 | struct dpci_rx_queue_cfg rx_queue_cfg; |
| 1058 | int ret, i; |
| 1059 | |
| 1060 | /*Do settings to get the frame on a DPCON object*/ |
| 1061 | rx_queue_cfg.options = DPCI_QUEUE_OPT_DEST | |
| 1062 | DPCI_QUEUE_OPT_USER_CTX; |
| 1063 | rx_queue_cfg.dest_cfg.dest_type = DPCI_DEST_DPCON; |
| 1064 | rx_queue_cfg.dest_cfg.dest_id = dpcon_dev->dpcon_id; |
| 1065 | rx_queue_cfg.dest_cfg.priority = DPAA2_EVENT_DEFAULT_DPCI_PRIO; |
| 1066 | |
| 1067 | dpci_dev->rx_queue[DPAA2_EVENT_DPCI_PARALLEL_QUEUE].cb = |
| 1068 | dpaa2_eventdev_process_parallel; |
| 1069 | dpci_dev->rx_queue[DPAA2_EVENT_DPCI_ATOMIC_QUEUE].cb = |
| 1070 | dpaa2_eventdev_process_atomic; |
| 1071 | |
| 1072 | for (i = 0 ; i < DPAA2_EVENT_DPCI_MAX_QUEUES; i++) { |
| 1073 | rx_queue_cfg.user_ctx = (size_t)(&dpci_dev->rx_queue[i]); |
| 1074 | ret = dpci_set_rx_queue(&dpci_dev->dpci, |
| 1075 | CMD_PRI_LOW, |
| 1076 | dpci_dev->token, i, |
| 1077 | &rx_queue_cfg); |
| 1078 | if (ret) { |
| 1079 | DPAA2_EVENTDEV_ERR( |
| 1080 | "DPCI Rx queue setup failed: err(%d)", |
| 1081 | ret); |
| 1082 | return ret; |
| 1083 | } |
| 1084 | } |
| 1085 | return 0; |
| 1086 | } |
| 1087 | |
| 1088 | static int |
| 1089 | dpaa2_eventdev_create(const char *name, struct rte_vdev_device *vdev) |
no test coverage detected