Function dlb2_probe

dpdk/drivers/event/dlb2/pf/dlb2_main.c:83–174

}

struct dlb2_dev *
dlb2_probe(struct rte_pci_device *pdev, const void *probe_args)
{
	struct dlb2_dev *dlb2_dev;
	int ret = 0;
	int dlb_version = 0;

	DLB2_INFO(dlb2_dev, "probe\n");

	dlb2_dev = rte_malloc("DLB2_PF", sizeof(struct dlb2_dev),
			      RTE_CACHE_LINE_SIZE);

	if (dlb2_dev == NULL) {
		ret = -ENOMEM;
		goto dlb2_dev_malloc_fail;
	}

	dlb_version = DLB2_HW_DEVICE_FROM_PCI_ID(pdev);

	/* PCI Bus driver has already mapped bar space into process.
	 * Save off our IO register and FUNC addresses.
	 */

	/* BAR 0 */
	if (pdev->mem_resource[0].addr == NULL) {
		DLB2_ERR(dlb2_dev, "probe: BAR 0 addr (csr_kva) is NULL\n");
		ret = -EINVAL;
		goto pci_mmap_bad_addr;
	}
	dlb2_dev->hw.func_kva = (void *)(uintptr_t)pdev->mem_resource[0].addr;
	dlb2_dev->hw.func_phys_addr = pdev->mem_resource[0].phys_addr;

	DLB2_INFO(dlb2_dev, "DLB2 FUNC VA=%p, PA=%p, len=%p\n",
		  (void *)dlb2_dev->hw.func_kva,
		  (void *)dlb2_dev->hw.func_phys_addr,
		  (void *)(pdev->mem_resource[0].len));

	/* BAR 2 */
	if (pdev->mem_resource[2].addr == NULL) {
		DLB2_ERR(dlb2_dev, "probe: BAR 2 addr (func_kva) is NULL\n");
		ret = -EINVAL;
		goto pci_mmap_bad_addr;
	}
	dlb2_dev->hw.csr_kva = (void *)(uintptr_t)pdev->mem_resource[2].addr;
	dlb2_dev->hw.csr_phys_addr = pdev->mem_resource[2].phys_addr;

	DLB2_INFO(dlb2_dev, "DLB2 CSR VA=%p, PA=%p, len=%p\n",
		  (void *)dlb2_dev->hw.csr_kva,
		  (void *)dlb2_dev->hw.csr_phys_addr,
		  (void *)(pdev->mem_resource[2].len));

	dlb2_dev->pdev = pdev;

	/* PM enable must be done before any other MMIO accesses, and this
	 * setting is persistent across device reset.
	 */
	dlb2_pf_enable_pm(dlb2_dev);