| 37 | } |
| 38 | |
| 39 | void |
| 40 | nps_pkt_solicited_port_disable(uint8_t *bar_addr, uint16_t port) |
| 41 | { |
| 42 | union nps_pkt_slc_ctl pkt_slc_ctl; |
| 43 | uint64_t reg_addr; |
| 44 | int max_retries = 5; |
| 45 | |
| 46 | /* clear enable bit */ |
| 47 | reg_addr = NPS_PKT_SLC_CTLX(port); |
| 48 | pkt_slc_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr); |
| 49 | pkt_slc_ctl.s.enb = 0; |
| 50 | nitrox_write_csr(bar_addr, reg_addr, pkt_slc_ctl.u64); |
| 51 | rte_delay_us_block(100); |
| 52 | |
| 53 | pkt_slc_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr); |
| 54 | while (pkt_slc_ctl.s.enb && max_retries--) { |
| 55 | rte_delay_ms(10); |
| 56 | pkt_slc_ctl.u64 = nitrox_read_csr(bar_addr, reg_addr); |
| 57 | } |
| 58 | } |
| 59 | |
| 60 | void |
| 61 | setup_nps_pkt_input_ring(uint8_t *bar_addr, uint16_t ring, uint32_t rsize, |
no test coverage detected