| 35 | } |
| 36 | |
| 37 | struct ccp_queue * |
| 38 | ccp_allot_queue(struct rte_cryptodev *cdev, int slot_req) |
| 39 | { |
| 40 | int i, ret = 0; |
| 41 | struct ccp_device *dev; |
| 42 | struct ccp_private *priv = cdev->data->dev_private; |
| 43 | |
| 44 | dev = TAILQ_NEXT(priv->last_dev, next); |
| 45 | if (unlikely(dev == NULL)) |
| 46 | dev = TAILQ_FIRST(&ccp_list); |
| 47 | priv->last_dev = dev; |
| 48 | if (dev->qidx >= dev->cmd_q_count) |
| 49 | dev->qidx = 0; |
| 50 | ret = rte_atomic64_read(&dev->cmd_q[dev->qidx].free_slots); |
| 51 | if (ret >= slot_req) |
| 52 | return &dev->cmd_q[dev->qidx]; |
| 53 | for (i = 0; i < dev->cmd_q_count; i++) { |
| 54 | dev->qidx++; |
| 55 | if (dev->qidx >= dev->cmd_q_count) |
| 56 | dev->qidx = 0; |
| 57 | ret = rte_atomic64_read(&dev->cmd_q[dev->qidx].free_slots); |
| 58 | if (ret >= slot_req) |
| 59 | return &dev->cmd_q[dev->qidx]; |
| 60 | } |
| 61 | return NULL; |
| 62 | } |
| 63 | |
| 64 | int |
| 65 | ccp_read_hwrng(uint32_t *value) |
no test coverage detected