| 349 | } |
| 350 | |
| 351 | __checkReturn efx_rc_t |
| 352 | efx_tx_qcreate( |
| 353 | __in efx_nic_t *enp, |
| 354 | __in unsigned int index, |
| 355 | __in unsigned int label, |
| 356 | __in efsys_mem_t *esmp, |
| 357 | __in size_t ndescs, |
| 358 | __in uint32_t id, |
| 359 | __in uint16_t flags, |
| 360 | __in efx_evq_t *eep, |
| 361 | __deref_out efx_txq_t **etpp, |
| 362 | __out unsigned int *addedp) |
| 363 | { |
| 364 | const efx_tx_ops_t *etxop = enp->en_etxop; |
| 365 | efx_txq_t *etp; |
| 366 | const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp); |
| 367 | efx_rc_t rc; |
| 368 | |
| 369 | EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); |
| 370 | EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_TX); |
| 371 | |
| 372 | EFSYS_ASSERT3U(enp->en_tx_qcount + 1, <, |
| 373 | enp->en_nic_cfg.enc_txq_limit); |
| 374 | |
| 375 | EFSYS_ASSERT(ISP2(encp->enc_txq_max_ndescs)); |
| 376 | EFSYS_ASSERT(ISP2(encp->enc_txq_min_ndescs)); |
| 377 | |
| 378 | if (!ISP2(ndescs) || |
| 379 | ndescs < encp->enc_txq_min_ndescs || |
| 380 | ndescs > encp->enc_txq_max_ndescs) { |
| 381 | rc = EINVAL; |
| 382 | goto fail1; |
| 383 | } |
| 384 | |
| 385 | /* Allocate an TXQ object */ |
| 386 | EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_txq_t), etp); |
| 387 | |
| 388 | if (etp == NULL) { |
| 389 | rc = ENOMEM; |
| 390 | goto fail2; |
| 391 | } |
| 392 | |
| 393 | etp->et_magic = EFX_TXQ_MAGIC; |
| 394 | etp->et_enp = enp; |
| 395 | etp->et_index = index; |
| 396 | etp->et_mask = ndescs - 1; |
| 397 | etp->et_esmp = esmp; |
| 398 | |
| 399 | /* Initial descriptor index may be modified by etxo_qcreate */ |
| 400 | *addedp = 0; |
| 401 | |
| 402 | if ((rc = etxop->etxo_qcreate(enp, index, label, esmp, |
| 403 | ndescs, id, flags, eep, etp, addedp)) != 0) |
| 404 | goto fail3; |
| 405 | |
| 406 | enp->en_tx_qcount++; |
| 407 | *etpp = etp; |
| 408 |
no test coverage detected