| 254 | |
| 255 | |
| 256 | __checkReturn efx_rc_t |
| 257 | efx_ev_qcreate_irq( |
| 258 | __in efx_nic_t *enp, |
| 259 | __in unsigned int index, |
| 260 | __in efsys_mem_t *esmp, |
| 261 | __in size_t ndescs, |
| 262 | __in uint32_t id, |
| 263 | __in uint32_t us, |
| 264 | __in uint32_t flags, |
| 265 | __in uint32_t irq, |
| 266 | __deref_out efx_evq_t **eepp) |
| 267 | { |
| 268 | const efx_ev_ops_t *eevop = enp->en_eevop; |
| 269 | efx_evq_t *eep; |
| 270 | const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp); |
| 271 | efx_rc_t rc; |
| 272 | |
| 273 | EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); |
| 274 | EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV); |
| 275 | |
| 276 | EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <, |
| 277 | enp->en_nic_cfg.enc_evq_limit); |
| 278 | |
| 279 | if (index >= encp->enc_evq_limit) { |
| 280 | rc = EINVAL; |
| 281 | goto fail1; |
| 282 | } |
| 283 | |
| 284 | if (us > encp->enc_evq_timer_max_us) { |
| 285 | rc = EINVAL; |
| 286 | goto fail2; |
| 287 | } |
| 288 | |
| 289 | switch (flags & EFX_EVQ_FLAGS_NOTIFY_MASK) { |
| 290 | case EFX_EVQ_FLAGS_NOTIFY_INTERRUPT: |
| 291 | break; |
| 292 | case EFX_EVQ_FLAGS_NOTIFY_DISABLED: |
| 293 | if (us != 0) { |
| 294 | rc = EINVAL; |
| 295 | goto fail3; |
| 296 | } |
| 297 | break; |
| 298 | default: |
| 299 | rc = EINVAL; |
| 300 | goto fail4; |
| 301 | } |
| 302 | |
| 303 | if ((flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) && |
| 304 | (encp->enc_ev_ew_desc_size == 0)) { |
| 305 | /* Extended width event descriptors are not supported. */ |
| 306 | rc = EINVAL; |
| 307 | goto fail5; |
| 308 | } |
| 309 | |
| 310 | EFSYS_ASSERT(ISP2(encp->enc_evq_max_nevs)); |
| 311 | EFSYS_ASSERT(ISP2(encp->enc_evq_min_nevs)); |
| 312 | |
| 313 | if (!ISP2(ndescs) || |
no test coverage detected