| 1373 | } |
| 1374 | |
| 1375 | int |
| 1376 | dev_init(struct dev *dev, struct plt_pci_device *pci_dev) |
| 1377 | { |
| 1378 | char name[MBOX_HANDLER_NAME_MAX_LEN]; |
| 1379 | int direction, up_direction, rc; |
| 1380 | uintptr_t bar2, bar4, mbox; |
| 1381 | uintptr_t vf_mbase = 0; |
| 1382 | uint64_t intr_offset; |
| 1383 | |
| 1384 | if (!dev_cache_line_size_valid()) |
| 1385 | return -EFAULT; |
| 1386 | |
| 1387 | if (!roc_plt_lmt_validate()) { |
| 1388 | plt_err("Failed to validate LMT line"); |
| 1389 | return -EFAULT; |
| 1390 | } |
| 1391 | |
| 1392 | bar2 = (uintptr_t)pci_dev->mem_resource[2].addr; |
| 1393 | bar4 = (uintptr_t)pci_dev->mem_resource[4].addr; |
| 1394 | if (bar2 == 0 || bar4 == 0) { |
| 1395 | plt_err("Failed to get PCI bars"); |
| 1396 | rc = -ENODEV; |
| 1397 | goto error; |
| 1398 | } |
| 1399 | |
| 1400 | /* Trigger fault on bar2 and bar4 regions |
| 1401 | * to avoid BUG_ON in remap_pfn_range() |
| 1402 | * in latest kernel. |
| 1403 | */ |
| 1404 | *(volatile uint64_t *)bar2; |
| 1405 | *(volatile uint64_t *)bar4; |
| 1406 | |
| 1407 | /* Check ROC model supported */ |
| 1408 | if (roc_model->flag == 0) { |
| 1409 | rc = UTIL_ERR_INVALID_MODEL; |
| 1410 | goto error; |
| 1411 | } |
| 1412 | |
| 1413 | dev->maxvf = pci_dev->max_vfs; |
| 1414 | dev->bar2 = bar2; |
| 1415 | dev->bar4 = bar4; |
| 1416 | dev_vf_hwcap_update(pci_dev, dev); |
| 1417 | |
| 1418 | if (dev_is_vf(dev)) { |
| 1419 | mbox = (roc_model_is_cn9k() ? |
| 1420 | bar4 : (bar2 + RVU_VF_MBOX_REGION)); |
| 1421 | direction = MBOX_DIR_VFPF; |
| 1422 | up_direction = MBOX_DIR_VFPF_UP; |
| 1423 | intr_offset = RVU_VF_INT; |
| 1424 | } else { |
| 1425 | mbox = bar4; |
| 1426 | direction = MBOX_DIR_PFAF; |
| 1427 | up_direction = MBOX_DIR_PFAF_UP; |
| 1428 | intr_offset = RVU_PF_INT; |
| 1429 | } |
| 1430 | |
| 1431 | /* Clear all RVUM interrupts */ |
| 1432 | clear_rvum_interrupts(dev); |
no test coverage detected