map the PCI resource of a PCI device in virtual memory */
| 92 | |
| 93 | /* map the PCI resource of a PCI device in virtual memory */ |
| 94 | int |
| 95 | pci_uio_map_resource(struct rte_pci_device *dev) |
| 96 | { |
| 97 | int i, map_idx = 0, ret; |
| 98 | uint64_t phaddr; |
| 99 | struct mapped_pci_resource *uio_res = NULL; |
| 100 | struct mapped_pci_res_list *uio_res_list = |
| 101 | RTE_TAILQ_CAST(rte_uio_tailq.head, mapped_pci_res_list); |
| 102 | |
| 103 | if (rte_intr_fd_set(dev->intr_handle, -1)) |
| 104 | return -1; |
| 105 | |
| 106 | if (rte_intr_dev_fd_set(dev->intr_handle, -1)) |
| 107 | return -1; |
| 108 | |
| 109 | /* allocate uio resource */ |
| 110 | ret = pci_uio_alloc_resource(dev, &uio_res); |
| 111 | if (ret) |
| 112 | return ret; |
| 113 | |
| 114 | /* secondary processes - use already recorded details */ |
| 115 | if (rte_eal_process_type() != RTE_PROC_PRIMARY) |
| 116 | return pci_uio_map_secondary(dev); |
| 117 | |
| 118 | /* Map all BARs */ |
| 119 | for (i = 0; i != PCI_MAX_RESOURCE; i++) { |
| 120 | /* skip empty BAR */ |
| 121 | phaddr = dev->mem_resource[i].phys_addr; |
| 122 | if (phaddr == 0) |
| 123 | continue; |
| 124 | |
| 125 | ret = pci_uio_map_resource_by_index(dev, i, |
| 126 | uio_res, map_idx); |
| 127 | if (ret) |
| 128 | goto error; |
| 129 | |
| 130 | map_idx++; |
| 131 | } |
| 132 | |
| 133 | uio_res->nb_maps = map_idx; |
| 134 | |
| 135 | TAILQ_INSERT_TAIL(uio_res_list, uio_res, next); |
| 136 | |
| 137 | return 0; |
| 138 | error: |
| 139 | for (i = 0; i < map_idx; i++) { |
| 140 | pci_unmap_resource(uio_res->maps[i].addr, |
| 141 | (size_t)uio_res->maps[i].size); |
| 142 | rte_free(uio_res->maps[i].path); |
| 143 | } |
| 144 | pci_uio_free_resource(dev, uio_res); |
| 145 | return -1; |
| 146 | } |
| 147 | |
| 148 | static void |
| 149 | pci_uio_unmap(struct mapped_pci_resource *uio_res) |
no test coverage detected