| 4299 | }; |
| 4300 | |
| 4301 | static int |
| 4302 | get_eth_dcb_conf(portid_t pid, struct rte_eth_conf *eth_conf, |
| 4303 | enum dcb_mode_enable dcb_mode, |
| 4304 | enum rte_eth_nb_tcs num_tcs, |
| 4305 | uint8_t pfc_en) |
| 4306 | { |
| 4307 | uint8_t i; |
| 4308 | int32_t rc; |
| 4309 | struct rte_eth_rss_conf rss_conf; |
| 4310 | |
| 4311 | /* |
| 4312 | * Builds up the correct configuration for dcb+vt based on the vlan tags array |
| 4313 | * given above, and the number of traffic classes available for use. |
| 4314 | */ |
| 4315 | if (dcb_mode == DCB_VT_ENABLED) { |
| 4316 | struct rte_eth_vmdq_dcb_conf *vmdq_rx_conf = |
| 4317 | ð_conf->rx_adv_conf.vmdq_dcb_conf; |
| 4318 | struct rte_eth_vmdq_dcb_tx_conf *vmdq_tx_conf = |
| 4319 | ð_conf->tx_adv_conf.vmdq_dcb_tx_conf; |
| 4320 | |
| 4321 | /* VMDQ+DCB RX and TX configurations */ |
| 4322 | vmdq_rx_conf->enable_default_pool = 0; |
| 4323 | vmdq_rx_conf->default_pool = 0; |
| 4324 | vmdq_rx_conf->nb_queue_pools = |
| 4325 | (num_tcs == RTE_ETH_4_TCS ? RTE_ETH_32_POOLS : RTE_ETH_16_POOLS); |
| 4326 | vmdq_tx_conf->nb_queue_pools = |
| 4327 | (num_tcs == RTE_ETH_4_TCS ? RTE_ETH_32_POOLS : RTE_ETH_16_POOLS); |
| 4328 | |
| 4329 | vmdq_rx_conf->nb_pool_maps = vmdq_rx_conf->nb_queue_pools; |
| 4330 | for (i = 0; i < vmdq_rx_conf->nb_pool_maps; i++) { |
| 4331 | vmdq_rx_conf->pool_map[i].vlan_id = vlan_tags[i]; |
| 4332 | vmdq_rx_conf->pool_map[i].pools = |
| 4333 | 1 << (i % vmdq_rx_conf->nb_queue_pools); |
| 4334 | } |
| 4335 | for (i = 0; i < RTE_ETH_DCB_NUM_USER_PRIORITIES; i++) { |
| 4336 | vmdq_rx_conf->dcb_tc[i] = i % num_tcs; |
| 4337 | vmdq_tx_conf->dcb_tc[i] = i % num_tcs; |
| 4338 | } |
| 4339 | |
| 4340 | /* set DCB mode of RX and TX of multiple queues */ |
| 4341 | eth_conf->rxmode.mq_mode = |
| 4342 | (enum rte_eth_rx_mq_mode) |
| 4343 | (rx_mq_mode & RTE_ETH_MQ_RX_VMDQ_DCB); |
| 4344 | eth_conf->txmode.mq_mode = RTE_ETH_MQ_TX_VMDQ_DCB; |
| 4345 | } else { |
| 4346 | struct rte_eth_dcb_rx_conf *rx_conf = |
| 4347 | ð_conf->rx_adv_conf.dcb_rx_conf; |
| 4348 | struct rte_eth_dcb_tx_conf *tx_conf = |
| 4349 | ð_conf->tx_adv_conf.dcb_tx_conf; |
| 4350 | |
| 4351 | memset(&rss_conf, 0, sizeof(struct rte_eth_rss_conf)); |
| 4352 | |
| 4353 | rc = rte_eth_dev_rss_hash_conf_get(pid, &rss_conf); |
| 4354 | if (rc != 0) |
| 4355 | return rc; |
| 4356 | |
| 4357 | rx_conf->nb_tcs = num_tcs; |
| 4358 | tx_conf->nb_tcs = num_tcs; |
no test coverage detected