| 359 | } |
| 360 | |
| 361 | static void |
| 362 | gen_random_rt_6(struct rt_rule_6 *rt, int nh_sz) |
| 363 | { |
| 364 | uint32_t a, i, j, k = 0; |
| 365 | |
| 366 | if (config.nb_routes_per_depth[0] != 0) { |
| 367 | memset(rt[k].addr, 0, 16); |
| 368 | rt[k].depth = 0; |
| 369 | rt[k++].nh = rte_rand() & get_max_nh(nh_sz); |
| 370 | } |
| 371 | |
| 372 | for (a = 0; a < 4; a++) { |
| 373 | for (i = 1; i <= 32; i++) { |
| 374 | uint32_t rnd; |
| 375 | double edge = 0; |
| 376 | double step = (double)(1ULL << i) / |
| 377 | config.nb_routes_per_depth[(a * 32) + i]; |
| 378 | for (j = 0; j < config.nb_routes_per_depth[a * 32 + i]; |
| 379 | j++, k++, edge += step) { |
| 380 | uint64_t rnd_val = get_rnd_rng((uint64_t)edge, |
| 381 | (uint64_t)(edge + step)); |
| 382 | rnd = rte_cpu_to_be_32(rnd_val << (32 - i)); |
| 383 | complete_v6_addr((uint32_t *)rt[k].addr, |
| 384 | rnd, a); |
| 385 | rt[k].depth = (a * 32) + i; |
| 386 | rt[k].nh = rte_rand() & get_max_nh(nh_sz); |
| 387 | } |
| 388 | } |
| 389 | } |
| 390 | } |
| 391 | |
| 392 | static inline void |
| 393 | set_rnd_ipv6(uint8_t *addr, uint8_t *route, int depth) |
no test coverage detected