| 783 | } |
| 784 | |
| 785 | static inline int |
| 786 | test_timer_cancel(void) |
| 787 | { |
| 788 | uint64_t i; |
| 789 | struct rte_event_timer *ev_tim; |
| 790 | const struct rte_event_timer tim = { |
| 791 | .ev.op = RTE_EVENT_OP_NEW, |
| 792 | .ev.queue_id = 0, |
| 793 | .ev.sched_type = RTE_SCHED_TYPE_ATOMIC, |
| 794 | .ev.priority = RTE_EVENT_DEV_PRIORITY_NORMAL, |
| 795 | .ev.event_type = RTE_EVENT_TYPE_TIMER, |
| 796 | .state = RTE_EVENT_TIMER_NOT_ARMED, |
| 797 | .timeout_ticks = CALC_TICKS(20), |
| 798 | }; |
| 799 | |
| 800 | for (i = 0; i < MAX_TIMERS; i++) { |
| 801 | TEST_ASSERT_SUCCESS(rte_mempool_get(eventdev_test_mempool, |
| 802 | (void **)&ev_tim), |
| 803 | "mempool alloc failed"); |
| 804 | *ev_tim = tim; |
| 805 | ev_tim->ev.event_ptr = ev_tim; |
| 806 | |
| 807 | TEST_ASSERT_EQUAL(rte_event_timer_arm_burst(timdev, &ev_tim, |
| 808 | 1), 1, "Failed to arm timer %d", |
| 809 | rte_errno); |
| 810 | |
| 811 | rte_delay_us(100 + (i % 5000)); |
| 812 | |
| 813 | TEST_ASSERT_EQUAL(rte_event_timer_cancel_burst(timdev, |
| 814 | &ev_tim, 1), 1, |
| 815 | "Failed to cancel event timer %d", rte_errno); |
| 816 | rte_mempool_put(eventdev_test_mempool, ev_tim); |
| 817 | } |
| 818 | |
| 819 | |
| 820 | TEST_ASSERT_SUCCESS(_wait_timer_triggers(30, MAX_TIMERS, |
| 821 | MAX_TIMERS), |
| 822 | "Timer triggered count doesn't match arm, cancel count"); |
| 823 | |
| 824 | return TEST_SUCCESS; |
| 825 | } |
| 826 | |
| 827 | static int |
| 828 | _cancel_producer(uint64_t timeout_tcks, uint64_t timers) |
nothing calls this directly
no test coverage detected