| 458 | } |
| 459 | |
| 460 | void BatchPaddingValidTest(TfLiteRegistration* registration, int num_thread) { |
| 461 | const int input_batch = 2; |
| 462 | const int input_width = 3; |
| 463 | const int input_height = 3; |
| 464 | const int input_depth = 4; |
| 465 | const int filter_batch = 1; |
| 466 | const int filter_size = 3; |
| 467 | const int filter_depth = 4; |
| 468 | DepthwiseConvolutionOpModel m( |
| 469 | registration, |
| 470 | {TensorType_FLOAT32, |
| 471 | {input_batch, input_height, input_width, input_depth}}, |
| 472 | {TensorType_FLOAT32, |
| 473 | {filter_batch, filter_size, filter_size, filter_depth}}, |
| 474 | {TensorType_FLOAT32, {}}, Padding_VALID); |
| 475 | |
| 476 | // clang-format off |
| 477 | m.SetInput({ |
| 478 | // array of 3 x 24 => [2, 3, 3, 4] |
| 479 | 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, |
| 480 | 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, |
| 481 | 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0 |
| 482 | }); |
| 483 | |
| 484 | m.SetFilter({ |
| 485 | // array of 9 x 4 => [1, 3, 3, 4] |
| 486 | 1, 2, 3, 4, |
| 487 | 1, 2, 3, 4, |
| 488 | 1, 2, 3, 4, |
| 489 | 1, 2, 3, 4, |
| 490 | 1, 2, 3, 4, |
| 491 | 1, 2, 3, 4, |
| 492 | 1, 2, 3, 4, |
| 493 | 1, 2, 3, 4, |
| 494 | 1, 2, 3, 4 |
| 495 | }); |
| 496 | // clang-format on |
| 497 | |
| 498 | // No bias for this test. |
| 499 | m.SetBias({0, 0, 0, 0}); |
| 500 | m.SetNumThreads(num_thread); |
| 501 | m.Invoke(); |
| 502 | |
| 503 | // clang-format off |
| 504 | EXPECT_THAT( |
| 505 | m.GetOutput(), |
| 506 | ElementsAreArray({ |
| 507 | 9, 18, 0, 0, |
| 508 | 9, 18, 0, 0 |
| 509 | })); |
| 510 | // clang-format on |
| 511 | } |
| 512 | |
| 513 | TEST_P(DepthwiseConvolutionOpTest, BatchPaddingValidTest) { |
| 514 | BatchPaddingValidTest(GetRegistration(), /*num_thread=*/1); |