| 519 | } |
| 520 | |
| 521 | void BatchPaddingSameTest(TfLiteRegistration* registration, int num_thread) { |
| 522 | const int input_batch = 4; |
| 523 | const int input_width = 2; |
| 524 | const int input_height = 2; |
| 525 | const int input_depth = 1; |
| 526 | const int filter_batch = 1; |
| 527 | const int filter_size = 3; |
| 528 | const int filter_depth = 1; |
| 529 | DepthwiseConvolutionOpModel m( |
| 530 | registration, |
| 531 | {TensorType_FLOAT32, |
| 532 | {input_batch, input_height, input_width, input_depth}}, |
| 533 | {TensorType_FLOAT32, |
| 534 | {filter_batch, filter_size, filter_size, filter_depth}}, |
| 535 | {TensorType_FLOAT32, {}}, Padding_SAME); |
| 536 | |
| 537 | // clang-format off |
| 538 | m.SetInput({ |
| 539 | // array of 4 x 4 => [4, 2, 2, 1] |
| 540 | 1, 1, 1, 1, |
| 541 | 0, 0, 0, 0, |
| 542 | 1, 1, 2, 2, |
| 543 | 2, 2, 2, 2 |
| 544 | }); |
| 545 | |
| 546 | m.SetFilter({ |
| 547 | // array of 3 x 3 => [1, 3, 3, 1] |
| 548 | 1, 1, 1, |
| 549 | 0, 2, 0, |
| 550 | 1, 1, 1 |
| 551 | }); |
| 552 | // clang-format on |
| 553 | |
| 554 | // No bias for this test. |
| 555 | m.SetBias({0}); |
| 556 | m.SetNumThreads(num_thread); |
| 557 | m.Invoke(); |
| 558 | |
| 559 | // clang-format off |
| 560 | EXPECT_THAT( |
| 561 | m.GetOutput(), |
| 562 | ElementsAreArray({ |
| 563 | 4, 4, 4, 4, |
| 564 | 0, 0, 0, 0, |
| 565 | 6, 6, 6, 6, |
| 566 | 8, 8, 8, 8 |
| 567 | })); |
| 568 | // clang-format on |
| 569 | } |
| 570 | |
| 571 | TEST_P(DepthwiseConvolutionOpTest, BatchPaddingSameTest) { |
| 572 | BatchPaddingSameTest(GetRegistration(), /*num_thread=*/1); |