| 25 | namespace { |
| 26 | |
| 27 | void PoorlyOrderedKernel(int iters) { |
| 28 | asm volatile( |
| 29 | "mov w0, %w[iters]\n" |
| 30 | "1:\n" |
| 31 | "subs w0, w0, #1\n" |
| 32 | "mul v0.4s, v0.4s, v0.4s\n" |
| 33 | "mul v0.4s, v0.4s, v0.4s\n" |
| 34 | "mul v0.4s, v0.4s, v0.4s\n" |
| 35 | "mul v0.4s, v0.4s, v0.4s\n" |
| 36 | "mul v1.4s, v1.4s, v1.4s\n" |
| 37 | "mul v1.4s, v1.4s, v1.4s\n" |
| 38 | "mul v1.4s, v1.4s, v1.4s\n" |
| 39 | "mul v1.4s, v1.4s, v1.4s\n" |
| 40 | "mul v2.4s, v2.4s, v2.4s\n" |
| 41 | "mul v2.4s, v2.4s, v2.4s\n" |
| 42 | "mul v2.4s, v2.4s, v2.4s\n" |
| 43 | "mul v2.4s, v2.4s, v2.4s\n" |
| 44 | "mul v3.4s, v3.4s, v3.4s\n" |
| 45 | "mul v3.4s, v3.4s, v3.4s\n" |
| 46 | "mul v3.4s, v3.4s, v3.4s\n" |
| 47 | "mul v3.4s, v3.4s, v3.4s\n" |
| 48 | "bne 1b\n" ::[iters] "r"(iters) |
| 49 | : "cc", "x0", "v0", "v1", "v2", "v3"); |
| 50 | } |
| 51 | |
| 52 | void NicelyOrderedKernel(int iters) { |
| 53 | asm volatile( |